公开(公告)号：US20190267088A1

公开(公告)日：2019-08-29

申请号：US16059317

申请日：2018-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Hoon JEON ,  Yoo Cheol Shin ,  Jun Hee Lim ,  Sung Kweon Baek ,  Chan Ho Lee ,  Won Chul Jang ,  Sun Gyung Hwang

IPC: G11C14/00 ,  G11C11/401 ,  H01L27/108 ,  H01L23/532

Abstract: A semiconductor device includes a substrate having a volatile memory region and a non-volatile memory region. The volatile memory region includes a cell capacitor disposed in the substrate and a cell transistor connected to the cell capacitor. The non-volatile memory region includes a plurality of non-volatile memory cells disposed on the substrate. The volatile memory region and the non-volatile memory region are disposed side by side.

公开(公告)号：US10685708B2

公开(公告)日：2020-06-16

申请号：US16059317

申请日：2018-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Hoon Jeon ,  Yoo Cheol Shin ,  Jun Hee Lim ,  Sung Kweon Baek ,  Chan Ho Lee ,  Won Chul Jang ,  Sun Gyung Hwang

IPC: G11C14/00 ,  G11C11/401 ,  H01L27/108 ,  H01L23/532 ,  H01L27/11582 ,  H01L27/105 ,  H01L27/11573

Abstract: A semiconductor device includes a substrate having a volatile memory region and a non-volatile memory region. The volatile memory region includes a cell capacitor disposed in the substrate and a cell transistor connected to the cell capacitor. The non-volatile memory region includes a plurality of non-volatile memory cells disposed on the substrate. The volatile memory region and the non-volatile memory region are disposed side by side.

公开(公告)号：US10304541B2

公开(公告)日：2019-05-28

申请号：US15881208

申请日：2018-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Gyung Hwang ,  Byoung Taek Kim ,  Yong Seok Kim ,  Ju Seok Lee

IPC: G11C16/10 ,  G11C16/12 ,  G11C16/08 ,  G11C16/04

Abstract: A memory device includes a memory cell array including a first switch cell, a second switch cell, and a plurality of memory cells disposed between the first the second switch cells and connected to a plurality of word lines, and a control circuit configured to perform a program operation by providing a program voltage to a first word line among the plurality of word lines, a switch voltage to a second word line among the plurality of word lines, and a pass voltage to remaining word lines among the plurality of word lines, wherein the control circuit is configured to turn off the first switch cell and the second switch cell in a first section of the program operation, and configured to turn on the first switch cell and increase the switch voltage in a second section of the program operation later than the first section.