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    Storage devices and methods of operating storage devices
    1.
    发明授权
    Storage devices and methods of operating storage devices 有权
    存储设备和操作存储设备的方法

    公开(公告)号：US09361997B2

    公开(公告)日：2016-06-07

    申请号：US14719969

    申请日：2015-05-22

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ju Seok Lee

    IPC: G11C16/06 ,  G11C16/34 ,  G11C16/04 ,  G11C16/26 ,  G11C16/08 ,  G11C11/56

    CPC classification number: G11C16/34 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3445 ,  G11C16/349

    Abstract: A method of operating a storage device may include receiving a read command and a read address, performing a read operation on selected memory cells corresponding to a selected string selection line and a selected word line based on the read address and performing a reliability verification read on unselected memory cells. Data read by the read operation may be output to an external device, and data read by the reliability verification read may be not output to the external device.

    Abstract translation: 操作存储设备的方法可以包括接收读取命令和读取地址，基于所读取的地址对所选择的字符串选择行和所选择的字线对应于所选择的存储器单元执行读取操作并执行读取可靠性验证 未选择的存储单元 通过读取操作读取的数据可以被输出到外部设备，并且可靠性验证读取的数据可能不被输出到外部设备。

    Non-volatile memory device and related method of operation
    2.
    发明授权
    Non-volatile memory device and related method of operation 有权
    非易失性存储器件及相关操作方法

    公开(公告)号：US09576672B2

    公开(公告)日：2017-02-21

    申请号：US14617976

    申请日：2015-02-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jaeyong Jeong ,  Ju Seok Lee

    IPC: G11C16/26 ,  G11C11/56 ,  G11C16/34 ,  G11C16/24

    CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/24 ,  G11C16/3454

    Abstract: A nonvolatile memory device comprises a cell array connected to a plurality of bit lines in an all bit line structure, a page buffer circuit connected to the plurality of bit lines, and control logic configured to control the page buffer circuit. The control logic controls the page buffer circuit to sense memory cells corresponding to both even-numbered and odd-numbered columns of a selected page in a first read mode and to sense memory cells corresponding to one of the even-numbered and odd-numbered columns of the selected page in a second read mode. A sensing operation is performed at least twice in the first read mode and once in the second read mode.

    Abstract translation: 非易失性存储器件包括连接到全位线结构中的多个位线的单元阵列，连接到多个位线的寻址缓冲器电路以及被配置为控制页缓冲器电路的控制逻辑。 控制逻辑控制页面缓冲电路以在第一读取模式中感测与选定页面的偶数和偶数列对应的存储器单元，并且读取对应于偶数和奇数列之一的存储器单元 的第二读取模式。 在第一读取模式下执行感测操作至少两次，并且在第二读取模式中执行一次感测操作。

    Memory device
    6.
    发明授权
    Memory device 有权

    公开(公告)号：US10304541B2

    公开(公告)日：2019-05-28

    申请号：US15881208

    申请日：2018-01-26

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sun Gyung Hwang ,  Byoung Taek Kim ,  Yong Seok Kim ,  Ju Seok Lee

    IPC: G11C16/10 ,  G11C16/12 ,  G11C16/08 ,  G11C16/04

    Abstract: A memory device includes a memory cell array including a first switch cell, a second switch cell, and a plurality of memory cells disposed between the first the second switch cells and connected to a plurality of word lines, and a control circuit configured to perform a program operation by providing a program voltage to a first word line among the plurality of word lines, a switch voltage to a second word line among the plurality of word lines, and a pass voltage to remaining word lines among the plurality of word lines, wherein the control circuit is configured to turn off the first switch cell and the second switch cell in a first section of the program operation, and configured to turn on the first switch cell and increase the switch voltage in a second section of the program operation later than the first section.

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