公开(公告)号：US20150115438A1

公开(公告)日：2015-04-30

申请号：US14520317

申请日：2014-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-chan LEE ,  Sung-hoon CHUN

IPC: H01L25/10 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/50 ,  H01L2224/02375 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05548 ,  H01L2224/05554 ,  H01L2224/06135 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/13099 ,  H01L2224/05599

Abstract: A semiconductor package comprising: a base substrate; a first semiconductor chip unit attached to the base substrate and including at least one first semiconductor chip; a second semiconductor chip unit stacked on the first semiconductor chip unit and including at least one second semiconductor chip; at least one third semiconductor chip disposed between the first semiconductor chip unit and the second semiconductor chip unit and having an area smaller than that of the at least one first semiconductor chip and that of the at least one second semiconductor chip; and an insulating material layer disposed between the first semiconductor chip unit and the second semiconductor chip unit to surround at least a portion of the at least one third semiconductor chip and having a thickness larger than that of the third semiconductor chip.

Abstract translation: 一种半导体封装，包括：基底; 第一半导体芯片单元，其附接到所述基底基板并且包括至少一个第一半导体芯片; 第二半导体芯片单元，堆叠在第一半导体芯片单元上并且包括至少一个第二半导体芯片; 设置在所述第一半导体芯片单元和所述第二半导体芯片单元之间并且具有比所述至少一个第一半导体芯片和所述至少一个第二半导体芯片的面积小的面积的至少一个第三半导体芯片; 以及绝缘材料层，设置在所述第一半导体芯片单元和所述第二半导体芯片单元之间，以围绕所述至少一个第三半导体芯片的至少一部分，并且具有比所述第三半导体芯片的厚度更大的厚度。