公开(公告)号：US20190252463A1

公开(公告)日：2019-08-15

申请号：US16392969

申请日：2019-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kil-ho Lee ,  Yoon-jong Song ,  Gwan-hyeob Koh

IPC: H01L27/22 ,  H01L43/02 ,  G11C11/16

CPC classification number: H01L27/228 ,  G11C11/161 ,  G11C11/1655 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A semiconductor device includes a substrate including a memory cell region and a logic region; a variable resistance memory device on the memory cell region; a logic device on the logic region; a first horizontal bit line extending in a horizontal direction on a surface of the substrate on the memory cell region and electrically connected to the variable resistance memory device; a second horizontal bit line extending in a horizontal direction on the surface of the substrate on the logic region and electrically connected to the logic device; and a vertical bit line electrically connected to the first horizontal bit line and the second horizontal bit line and extending perpendicular to the surface of the substrate.

公开(公告)号：US10319784B2

公开(公告)日：2019-06-11

申请号：US15858349

申请日：2017-12-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kil-ho Lee ,  Yoon-jong Song ,  Gwan-hyeob Koh

IPC: H01L27/22 ,  H01L43/02 ,  H01L43/08 ,  G11C11/16 ,  H01L43/12

Abstract: A semiconductor device includes a substrate including a memory cell region and a logic region; a variable resistance memory device on the memory cell region; a logic device on the logic region; a first horizontal bit line extending in a horizontal direction on a surface of the substrate on the memory cell region and electrically connected to the variable resistance memory device; a second horizontal bit line extending in a horizontal direction on the surface of the substrate on the logic region and electrically connected to the logic device; and a vertical bit line electrically connected to the first horizontal bit line and the second horizontal bit line and extending perpendicular to the surface of the substrate.

公开(公告)号：US10651236B2

公开(公告)日：2020-05-12

申请号：US16392969

申请日：2019-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kil-ho Lee ,  Yoon-jong Song ,  Gwan-hyeob Koh

IPC: H01L27/22 ,  H01L43/08 ,  G11C11/16 ,  H01L43/02 ,  H01L43/12

Abstract: A semiconductor device includes a substrate including a memory cell region and a logic region; a variable resistance memory device on the memory cell region; a logic device on the logic region; a first horizontal bit line extending in a horizontal direction on a surface of the substrate on the memory cell region and electrically connected to the variable resistance memory device; a second horizontal bit line extending in a horizontal direction on the surface of the substrate on the logic region and electrically connected to the logic device; and a vertical bit line electrically connected to the first horizontal bit line and the second horizontal bit line and extending perpendicular to the surface of the substrate.

公开(公告)号：US11301319B2

公开(公告)日：2022-04-12

申请号：US16575615

申请日：2019-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-seok Suh ,  Gwan-hyeob Koh ,  Yoon-jong Song

IPC: G06F11/10 ,  G11C7/06 ,  G06F13/16 ,  G06F13/40

Abstract: A memory system includes a memory cell array including a first memory area and a second memory area, an input/output circuit including input/output lines for transmitting or receiving data bits and parity bits to or from the first and second memory areas, and an error correction circuit including a plurality of sub error correction circuits including a first sub error correction circuit for performing a first error correction operation on first data bits of the first memory area received through the input/output lines, and a second sub error correction circuit for performing a second error correction operation on second data bits of the second memory area received through the input/output lines. The first memory area has a higher bit error rate than the second memory area.

公开(公告)号：US20180350876A1

公开(公告)日：2018-12-06

申请号：US15858349

申请日：2017-12-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kil-ho Lee ,  Yoon-jong Song ,  Gwan-hyeob Koh

IPC: H01L27/22 ,  H01L43/08 ,  H01L43/02 ,  G11C11/16

CPC classification number: H01L27/228 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A semiconductor device includes a substrate including a memory cell region and a logic region; a variable resistance memory device on the memory cell region; a logic device on the logic region; a first horizontal bit line extending in a horizontal direction on a surface of the substrate on the memory cell region and electrically connected to the variable resistance memory device; a second horizontal bit line extending in a horizontal direction on the surface of the substrate on the logic region and electrically connected to the logic device; and a vertical bit line electrically connected to the first horizontal bit line and the second horizontal bit line and extending perpendicular to the surface of the substrate.