KALMAN FILTER BASED PHASE-LOCKED LOOP WITH RE-ENCODING BASED PHASE DETECTOR

    公开(公告)号:US20250088345A1

    公开(公告)日:2025-03-13

    申请号:US18392416

    申请日:2023-12-21

    Abstract: A wireless communications device includes a receiver having a phase detector configured to extract frequency offset and provide a corresponding error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal. The receiver has a phase-locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal. The receiver has a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal. The receiver may have a re-encoding-based processing circuit configured to provide the expected transmitted data signal based on a preliminarily decoded symbol.

    Improving accuracy of round-trip time (RTT) in high accuracy distance measurements (HADM)

    公开(公告)号:US12245182B2

    公开(公告)日:2025-03-04

    申请号:US17980704

    申请日:2022-11-04

    Inventor: Guner Arslan

    Abstract: A system and method to improve the accuracy of the measurement of round trip delay in a high accuracy distance measurement (HADM) is disclosed. In one embodiment, the traditional parabolic estimation is used. However, an estimation error is used to compensate for the inaccuracy of the parabolic estimation. This correction may reduce the standard deviation of a measurement by 50% or more. In another embodiment, the parabolic estimation is not used; rather, a different estimation is used, such as an absolute value estimation. In some tests, the absolute value estimation improved the mean measurement value and reduced the standard deviation by 50%.

    Man in the Middle Attack Detection in BLE High Accuracy Distance Measurement

    公开(公告)号:US20240053432A1

    公开(公告)日:2024-02-15

    申请号:US17887836

    申请日:2022-08-15

    Inventor: Guner Arslan

    CPC classification number: G01S7/021 G01S13/76

    Abstract: A system that is capable of detecting a Man in the Middle attack is disclosed. The system includes a receive circuit for receiving incoming packets. The system also includes a digitized model of at least part of the receive circuit and optionally part of the transmit circuit. The system compares the output from the digitized model with the output from the read circuit to determine the likelihood of a Man in the Middle Attack. In certain embodiments, the digitized model is a finite impulse response filter with multiple taps. The system correctly identifies Man in the Middle attacks more than 90% of the time when the signal to noise ratio is greater than 20 dB.

    System and method of operating automatic gain control in the presence of high peak-to-average ratio blockers

    公开(公告)号:US10742185B1

    公开(公告)日:2020-08-11

    申请号:US16367908

    申请日:2019-03-28

    Abstract: A wireless receiver including a gain network that adjusts a gain of a received wireless signal and provides an RF signal, a level detector that provides a level indication while a strength of the RF signal is at least an RF level threshold, a timing system that provides a timing value indicative of a total amount of time that the level indication is provided during a timing window, a gain up disable circuit that provides a gain up disable signal when the timing value reaches a low threshold, a blocker strength detect circuit that provides a gain down request signal when the timing value reaches a high threshold, and an AGC circuit that does not increase the gain of the gain network while the gain up disable signal is provided, and that allows a reduction of the gain of the gain network while the gain down request signal is provided.

    Spur Cancellation Systems and Related Methods
    5.
    发明申请
    Spur Cancellation Systems and Related Methods 有权
    支线取消系统及相关方法

    公开(公告)号:US20150124914A1

    公开(公告)日:2015-05-07

    申请号:US14074355

    申请日:2013-11-07

    Inventor: Guner Arslan

    CPC classification number: H04B15/04 H04B15/06

    Abstract: Spur cancellation systems and related methods are disclosed for radio frequency (RF) receivers and other implementations. Disclosed embodiments effectively remove spurs caused by digital clock signals or other spur sources by determining which spurs will fall within a channel selected to be tuned, utilizing a spur cancellation module to generate a cancellation signal, and subtracting this cancellation signal from the digital information. The cancellation signal can be initially generated with a known frequency and estimated values for unknown spur parameters, such as amplitude and phase. Digital feedback signals are then used to adjust the spur parameters. If the spur frequency is not known precisely, digital feedback signals can also be used to adjust the frequency of the cancellation signal. Where multiple receive paths are provided within a multi-receiver system, multiple spur cancellation modules can be used to remove spurs generated by digital clocks within each of the receive paths.

    Abstract translation: 针对射频(RF)接收机和其他实施方式公开了支线消除系统和相关方法。 公开的实施例通过使用支线消除模块来产生消除信号,并且从数字信息中减去该消除信号,有效地消除了由数字时钟信号或其他辅助信号源引起的杂波,通过确定哪些杂散落入被选择调谐的信道内。 最初可以用已知频率和未知支线参数的估计值(例如振幅和相位)来生成抵消信号。 然后使用数字反馈信号来调整支线参数。 如果杂散频率不准确,数字反馈信号也可用于调整消除信号的频率。 在多接收机系统内提供多个接收路径的情况下,可以使用多个分支消除模块来去除每个接收路径内的数字时钟产生的杂散。

    Baudrate Tracking with a Cost Function Engine for Pattern Detection

    公开(公告)号:US20250106000A1

    公开(公告)日:2025-03-27

    申请号:US18373621

    申请日:2023-09-27

    Inventor: Guner Arslan

    Abstract: A synchronization pattern detector is disclosed. The synchronization pattern detector includes a plurality of cost function engines which each calculate a partial cost of a subset of the incoming data bits. The cost function engines are arranged in a two dimensional array where each row processes data samples associated with a particular phase of the incoming data bits. These partial costs are summed together to calculate a total cost for a particular symbol stream. Summing circuits are configured to calculate costs for various scenarios, such as transmit baudrate equal to the receiver baudrate; transmit baudrate slower than the receiver baudrate; and transmit baudrate faster than the receiver baudrate. In addition to detecting the synchronization pattern, the detector may also provide information that is used to adjust parameters of the read circuit to better align the receiver baudrate to the transmit baudrate.

    Fast signal identification of Bluetooth, ZigBee and other network protocols

    公开(公告)号:US11611907B2

    公开(公告)日:2023-03-21

    申请号:US17840107

    申请日:2022-06-14

    Abstract: A system and method for detecting the presence of a Bluetooth or Zigbee signal within a short period of time is disclosed. The signal identification circuit has two stages, a first stage that processes windows to determine whether noise is present, and a second stage that processes long windows to determine whether the signal is a particular lower-power network protocol. The signal identification circuit can be configured to detect Bluetooth at 1 Mbps, Bluetooth at 2 Mbps or Zigbee. The signal identification signal may be used to allow a lower-power network controller to coexist with a high duty cycle WiFi controller. The signal identification circuit may also be used for other functions, such as powering on a lower-power network controller, determining CCA, or determining which channel a packet is being transmitted on.

    SYSTEM AND METHOD OF ADAPTIVE CORRELATION THRESHOLD FOR BANDLIMITED SIGNALS

    公开(公告)号:US20200313844A1

    公开(公告)日:2020-10-01

    申请号:US16367962

    申请日:2019-03-28

    Abstract: A wireless receiver including a front end circuit, an adaptive threshold circuit, and a correlator. The front end circuit converts a wireless signal into a series of digital symbols. The adaptive threshold circuit provides an adaptive correlation threshold that is adapted based on a sync word. The correlator correlates the digital symbols with the sync word using the adaptive correlation threshold. The adaptive correlation threshold may be based on amplitude attenuation of the digital symbols that correspond to transitions of the sync word. The adaptive threshold circuit may be a lookup table that stores different threshold values each corresponding to one of multiple different sync words. Alternatively, the adaptive threshold circuit may be implemented as an evaluation circuit that determines the adaptive correlation threshold based on expected amplitude attenuation of the digital symbols that correspond to transitions of the sync word.

    Die-to-die communication links for receiver integrated circuit dies and related methods
    10.
    发明授权
    Die-to-die communication links for receiver integrated circuit dies and related methods 有权
    用于接收器集成电路管芯的模 - 模通信链路和相关方法

    公开(公告)号:US09252891B2

    公开(公告)日:2016-02-02

    申请号:US14575391

    申请日:2014-12-18

    CPC classification number: H04B15/00

    Abstract: Die-to-die communication links for receiver integrated circuit dies within multi-die systems and related methods are disclosed for radio frequency (RF) receivers. The disclosed embodiments provide die-to-die communication links that allow for direct communication of operating parameters between receiver integrated circuit dies and other integrated circuit dies within a multi-die system so that the operation of receive path circuitry can be adjusted without requiring intervention from an external host processor integrated circuit. A variety of operating parameter information can be communicated through the die-to-die communication links so that the integrated circuit dies can quickly adjust to changing signal conditions without requiring intervention by the external host processor integrated circuit.

    Abstract translation: 针对射频(RF)接收机公开了用于多芯片系统内的接收机集成电路管芯的模 - 模通信链路和相关方法。 所公开的实施例提供了允许在多管芯系统内的接收器集成电路管芯与其他集成电路管芯之间的操作参数的直接通信的管芯到管芯通信链路,使得可以调整接收路径电路的操作,而无需干预 外部主机处理器集成电路。 可以通过管芯到管芯通信链路传送各种操作参数信息,使得集成电路管芯可以快速地适应不断变化的信号条件,而不需要外部主机处理器集成电路的干预。

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