公开(公告)号：US11449416B2

公开(公告)日：2022-09-20

申请号：US16732944

申请日：2020-01-02

Applicant: Silicon Motion, Inc.

Inventor： Che-Wei Hsu

IPC: G06F12/02 ,  G06F13/16 ,  G06F12/0882 ,  G06F11/10 ,  G06F7/544

Abstract: The invention introduces an apparatus for handling flash physical-resource sets, at least including a random access memory (RAM), a processing unit and an address conversion circuit. The RAM includes multiple segments of temporary space and each segment thereof stores variables associated with a specific flash physical-resource set. The processing unit accesses user data of a flash physical-resource set when executing program code of a Flash Translation Layer (FTL). The address conversion circuit receives a memory address issued from the FTL, converts the memory address into a relative address of one segment of temporary space associated with the flash physical-resource set and outputs the relative address to the RAM for accessing a variable of the associated segment of temporary space.

公开(公告)号：US10896004B2

公开(公告)日：2021-01-19

申请号：US16505264

申请日：2019-07-08

Applicant: Silicon Motion, Inc.

Inventor： Ting-Han Lin ,  Che-Wei Hsu

IPC: G06F13/00 ,  G06F3/06

Abstract: High-efficiency control technology for non-volatile memory. A controller allocates spare blocks of a non-volatile memory to provide an active block and writes data issued by a host to the active block. The controller further uses the active block as the destination for data transferred from a first source block when there are fewer spare blocks than the threshold amount. When a second source block meets the transfer requirements, the controller uses the active block as the destination for data transferred from the second source block.

公开(公告)号：US20190050167A1

公开(公告)日：2019-02-14

申请号：US15922669

申请日：2018-03-15

Applicant: Silicon Motion, Inc.

Inventor： Ming-Chang Hsieh ,  Che-Wei Hsu ,  Wen-Chi Hong

IPC: G06F3/06 ,  G06F9/38 ,  G06F11/14 ,  G06F11/10

Abstract: A storage device receiving an external instruction from a host includes a plurality of flash memory spaces and a controller. The controller receives the external instruction, queues the external instruction in a first command queue, translates the external instruction into a plurality of operation commands, and sequentially executes the operation commands to respectively operate the flash memory spaces. The controller further gives an identity code to at least one specific operation command to track the execution result of the specific operation command.

公开(公告)号：US11675698B2

公开(公告)日：2023-06-13

申请号：US17879166

申请日：2022-08-02

Applicant: Silicon Motion, Inc.

Inventor： Che-Wei Hsu

IPC: G06F12/02 ,  G06F12/0882 ,  G06F13/16 ,  G06F11/10 ,  G06F7/544

CPC classification number: G06F12/0246 ,  G06F7/5443 ,  G06F11/1004 ,  G06F12/0882 ,  G06F13/1673 ,  G06F2212/7201 ,  G06F2212/7207

Abstract: The invention introduces an apparatus for handling flash physical-resource sets, at least including a random access memory (RAM), a processing unit and an address conversion circuit. The RAM includes multiple segments of temporary space and each segment thereof stores variables associated with a specific flash physical-resource set. The processing unit accesses user data of a flash physical-resource set when executing program code of a Flash Translation Layer (FTL). The address conversion circuit receives a memory address issued from the FTL, converts the memory address into a relative address of one segment of temporary space associated with the flash physical-resource set and outputs the relative address to the RAM for accessing a variable of the associated segment of temporary space.

公开(公告)号：US11288182B2

公开(公告)日：2022-03-29

申请号：US16732542

申请日：2020-01-02

Applicant: Silicon Motion, Inc.

Inventor： Che-Wei Hsu

IPC: G06F12/02 ,  G06F12/0882 ,  G06F13/16 ,  G06F11/10 ,  G06F7/544

Abstract: The invention introduces a method for multi-namespace data access, performed by a controller, at least including: obtaining a host write command from a host, which includes user data and metadata associated with one Logical Block Address (LBA) or more; and programming the user data and the metadata into a user-data part and a metadata part of a segment of a Logical Unit Number (LUN), respectively, wherein a length of the metadata part is the maximum metadata length of a plurality of LBA formats that the controller supports.

公开(公告)号：US20190087343A1

公开(公告)日：2019-03-21

申请号：US16193156

申请日：2018-11-16

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Che-Wei Hsu

IPC: G06F12/0873

Abstract: The invention introduces a method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.

公开(公告)号：US20190027221A1

公开(公告)日：2019-01-24

申请号：US15859709

申请日：2018-01-01

Applicant: Silicon Motion Inc.

Inventor： Che-Wei Hsu ,  Hsin-Hsiang Tseng

IPC: G11C16/10 ,  G11C11/56 ,  G11C16/04 ,  G06F12/02 ,  G06F3/06

Abstract: A method for performing programming management, associated memory device and a controller thereof are provided. The memory device may include a non-volatile (NV) memory, and the NV memory may include a plurality of NV memory elements. The method may include: before programming a target NV memory element of the plurality of NV memory elements, checking whether another NV memory element of the plurality of NV memory elements is in a busy state or in a non-busy state; and when the other NV memory element enters the non-busy state, programming the target NV memory element.

公开(公告)号：US11294586B2

公开(公告)日：2022-04-05

申请号：US16251034

申请日：2019-01-17

Applicant: Silicon Motion Inc.

Inventor： Che-Wei Hsu ,  Hsin-Hsiang Tseng

IPC: G06F3/06

Abstract: A method for performing read acceleration, an associated data storage device and controller thereof are provided, where the method is applicable to the data storage device and the controller. The method includes: receiving a write command from a host device, and performing programming on a non-volatile (NV) memory element within a plurality of NV memory elements according to the write command; recording operation command-related information corresponding to the write command; when a read command having high priority exists in a queue corresponding to the NV memory element, suspending performing programming on the NV memory element; executing the read command; and after executing the read command, continuing performing programming on the NV memory element at least according to the operation command-related information.

公开(公告)号：US20160259679A1

公开(公告)日：2016-09-08

申请号：US14862697

申请日：2015-09-23

Applicant: Silicon Motion, Inc.

Inventor： Che-Wei Hsu

IPC: G06F11/07 ,  G06F3/06 ,  G06F12/08 ,  G11C11/56

CPC classification number: G06F12/0802 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/1032 ,  G06F2212/1036 ,  G06F2212/205 ,  G06F2212/7209 ,  G06F2212/7211 ,  G11C11/5628 ,  G11C16/0483

Abstract: A method for reprogramming data, performed by a processing unit, is disclosed to include at least the following steps. After a page of data has failed to be programmed into a first block of a storage unit, it is determined whether the failed page is an upper page or a first lower page. When the failed page is an upper page, a host page number associated with a second lower page of a wordline including at least the failed page is obtained, a second block is selected, and an access interface is directed to reprogram data from the second lower page to the upper page into the second block.

Abstract translation: 公开了一种由处理单元执行的重新编程数据的方法，至少包括以下步骤。 在一页数据未被编程到存储单元的第一块中之后，确定故障页是否是上页还是第一下页。 当故障页面是上部页面时，获得与至少包括故障页面的字线的第二下部页面相关联的主页面编号，选择第二块，并且访问接口被指示从第二较低页面重新编程数据 页面到上一页进入第二个块。

公开(公告)号：US20160132432A1

公开(公告)日：2016-05-12

申请号：US14738464

申请日：2015-06-12

Applicant: Silicon Motion, Inc.

Inventor： Yang-Chih Shen ,  Che-Wei Hsu

IPC: G06F12/08

CPC classification number: G06F12/0873 ,  G06F2212/1021 ,  G06F2212/313 ,  G06F2212/608

Abstract: A method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.

Abstract translation: 一种用于缓存和读取要被编程到由处理单元执行的存储单元中的数据的方法，至少包括以下步骤。 通过访问接口从主设备接收用于至少将数据页编程到第一地址中的写入命令。 确定是否已经收集要编程的数据块，其中块包含指定数量的页面。 数据页被存储在DRAM（动态随机存取存储器）中，并且更新高速缓存信息以指示数据页未被编程到存储单元中，并且还指示当块被缓存时缓存数据页的DRAM的位置 的待编程数据尚未收集。