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公开(公告)号：US09768340B2
公开(公告)日：2017-09-19
申请号：US14552995
申请日：2014-11-25
Applicant: Texas Instruments Incorporated
Inventor： Debarshi Basu , Henry Litzmann Edwards , Dimitar Trifonov Trifonov , Josh Du
IPC: H01L31/101 , H01L31/11
CPC classification number: H01L31/1105
Abstract: This invention relates to field photodiodes based on PN junctions that suffer from dark current leakage. An NBL is added to prove a second PN junction with the anode. The second PN junction is reversed biased in order to remove dark current leakage. The present solution requires no additional masks or thin films steps relative to a conventional CMOS process flow.
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公开(公告)号：US08742523B2
公开(公告)日：2014-06-03
申请号：US13768024
申请日：2013-02-15
Applicant: Texas Instruments Incorporated
Inventor： Henry Litzmann Edwards , Dimitar Trifonov Trifonov
IPC: H01L27/14
CPC classification number: H01L31/02002 , H01L31/022408 , H01L31/1013 , H01L31/103
Abstract: A semiconductor device contains a photodiode which has a plurality of p-n junctions disposed in a stack. Two contact structures on the semiconductor device are connected across at least one of the junctions to allow electrical connection to an external detection circuit, so that signal current from incident light on the photodiode which generates electron-hole pairs across the connected junction may be sensed by the external detection circuit. At least one of the junctions is electrically shorted at the semiconductor device, so that signal current from the shorted junction may not be sensed by the external detection circuit.
Abstract translation: 半导体器件包含具有布置在堆叠中的多个p-n结的光电二极管。 半导体器件上的两个接触结构连接在至少一个结点上，以允许与外部检测电路的电连接，从而在穿过连接的接合点产生电子 - 空穴对的光电二极管上的入射光的信号电流可以被 外部检测电路。 至少一个结点在半导体器件处电气短路，使得来自短路端的信号电流可能不被外部检测电路感测到。
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公开(公告)号：US10691156B2
公开(公告)日：2020-06-23
申请号：US15691957
申请日：2017-08-31
Applicant: Texas Instruments Incorporated
Inventor： Dimitar Trifonov Trifonov
Abstract: Embodiments relate to a circuit including a first circuit branch, a second circuit branch, and an integrator circuit. The first branch includes a first transistor and a first current source to generate a first CTAT voltage signal that includes components corresponding to parasitic base and emitter resistances of the first transistor. The second branch includes a second transistor and a second current source to generate a second CTAT voltage signal that includes components corresponding to parasitic base and emitter resistances of the second transistor. The first and second circuit branches are coupled to the integrator circuit such that the integrator circuit integrates a difference between the first and second CTAT voltage signals such that the integrated signal does not include any components corresponding to parasitic base and emitter resistances.
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公开(公告)号：US10003306B1
公开(公告)日：2018-06-19
申请号：US15467417
申请日：2017-03-23
Applicant: Texas Instruments Incorporated
Inventor： Tony Ray Larson , Dimitar Trifonov Trifonov , Biraja Prasad Dash
CPC classification number: H03F1/26 , H03F3/387 , H03F3/45475 , H03F3/45968 , H03F2200/171 , H03F2200/271 , H03F2200/375 , H03F2200/459
Abstract: Embodiments relate to a chopped amplifier system where a ripple reduction filter placed outside of a main signal path is disclosed. The chopped amplifier system includes a chopped amplifier having an input terminal and an output terminal, where the input terminal receives an input signal and the output terminal provides an output signal including a ripple that is based on an offset voltage of the chopped amplifier. The ripple reduction filter is placed in a feedback loop path that receives a portion of the chopped amplifier's output signal and provides a feedback signal to the chopped amplifier that reduces the ripple at the output of the chopped amplifier. The ripple reduction filter includes a digital controller and other circuits that can handle large disturbances such as large signal slew rate events and large common-mode steps without reducing the effectiveness of the ripple reduction filter in reducing the ripple.
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公开(公告)号：US10483920B2
公开(公告)日：2019-11-19
申请号：US15982666
申请日：2018-05-17
Applicant: Texas Instruments Incorporated
Inventor： Tony Ray Larson , Dimitar Trifonov Trifonov , Biraja Prasad Dash
Abstract: Embodiments relate to a chopped amplifier system where a ripple reduction filter placed outside of a main signal path is disclosed. The chopped amplifier system includes a chopped amplifier having an input terminal and an output terminal, where the input terminal receives an input signal and the output terminal provides an output signal including a ripple that is based on an offset voltage of the chopped amplifier. The ripple reduction filter is placed in a feedback loop path that receives a portion of the chopped amplifier's output signal and provides a feedback signal to the chopped amplifier that reduces the ripple at the output of the chopped amplifier. The ripple reduction filter includes a digital controller and other circuits that can handle large disturbances such as large signal slew rate events and large common-mode steps without reducing the effectiveness of the ripple reduction filter in reducing the ripple.
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Patent Agency Ranking
公开(公告)号：US09082905B2
公开(公告)日：2015-07-14
申请号：US13768037
申请日：2013-02-15
Applicant: Texas Instruments Incorporated
Inventor： Henry Litzmann Edwards , Dimitar Trifonov Trifonov
IPC: H01L31/062 , H01L31/0236 , H01L31/0216 , H01L31/0232 , H01L31/103
CPC classification number: H01L31/02366 , H01L31/02161 , H01L31/02327 , H01L31/103
Abstract: A semiconductor device contains a photodiode formed in a substrate of the semiconductor device. At a top surface of the substrate, over the photodiode, a surface grating of periodic field oxide in a periodic configuration and/or gate structures in a periodic configuration is formed. The field oxide may be formed using an STI process or a LOCOS process. A semiconductor device with a surface grating including both field oxide and gate structures has the gate structures over the semiconductor substrate, between the field oxide. The surface grating has a pitch length up to 3 microns. The surface grating covers at least half of the photodiode.
Abstract translation: 半导体器件包含形成在半导体器件的衬底中的光电二极管。 在衬底的顶表面上，在光电二极管上，形成具有周期性构造的周期性场氧化物的表面光栅和/或周期性构造的/或栅极结构。 场氧化物可以使用STI工艺或LOCOS工艺形成。 具有包括场氧化物和栅极结构的表面光栅的半导体器件在半导体衬底之间具有位于场氧化物之间的栅极结构。 表面光栅具有高达3微米的间距长度。 表面光栅覆盖光电二极管的至少一半。
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公开(公告)号：US20150145097A1
公开(公告)日：2015-05-28
申请号：US14552995
申请日：2014-11-25
Applicant: Texas Instruments Incorporated
Inventor： Debarshi Basu , Henry Litzmann Edwards , Dimitar Trifonov Trifonov , Josh Du
CPC classification number: H01L31/1105
Abstract: This invention relates to field photodiodes based on PN junctions that suffer from dark current leakage. An NBL is added to prove a second PN junction with the anode. The second PN junction is reversed biased in order to remove dark current leakage. The present solution requires no additional masks or thin films steps relative to a conventional CMOS process flow.
Abstract translation: 本发明涉及基于PN结的场致电二极管，其具有暗电流泄漏。 添加NBL以证明与阳极的第二PN结。 第二个PN结被反向偏置，以消除暗电流泄漏。 本解决方案不需要相对于常规CMOS工艺流程的附加掩模或薄膜步骤。
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公开(公告)号：US11867773B2
公开(公告)日：2024-01-09
申请号：US16888927
申请日：2020-06-01
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Partha Sarathi Basu , Dimitar Trifonov Trifonov , Tony Ray Larson , Chao-Hsiuan Tsay
CPC classification number: G01R33/0017 , G01R33/072 , G06G7/184
Abstract: A dual integrator system comprises two integrators, an output stage, and a switching network. The first and second integrators receive a differential Hall sensor signal and a reference voltage. The first integrator outputs a first integrator signal based on the differential Hall sensor and the reference voltage. The second integrator outputs a second integrator signal based on the differential Hall sensor signal and the reference voltage. The first integrator comprises a first offset cancellation feedback loop, and the second integrator comprises a second offset cancellation feedback loop. The switching network is coupled to the first and second integrators and to the output stage, and alternates which of the first and second integrators is coupled to the output stage. In some embodiments, the first and second integrators each perform a reset operation, a sampling operation, an integration operation, a differential to single-ended conversion operation, and a holding operation.
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公开(公告)号：US20190064868A1
公开(公告)日：2019-02-28
申请号：US15691957
申请日：2017-08-31
Applicant: Texas Instruments Incorporated
Inventor： Dimitar Trifonov Trifonov
CPC classification number: G05F3/30 , G05F3/225 , H03K3/2826
Abstract: Embodiments relate to a circuit including a first circuit branch, a second circuit branch, and an integrator circuit. The first branch includes a first transistor and a first current source to generate a first CTAT voltage signal that includes components corresponding to parasitic base and emitter resistances of the first transistor. The second branch includes a second transistor and a second current source to generate a second CTAT voltage signal that includes components corresponding to parasitic base and emitter resistances of the second transistor. The first and second circuit branches are coupled to the integrator circuit such that the integrator circuit integrates a difference between the first and second CTAT voltage signals such that the integrated signal does not include any components corresponding to parasitic base and emitter resistances.
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公开(公告)号：US20180337639A1
公开(公告)日：2018-11-22
申请号：US15982666
申请日：2018-05-17
Applicant: Texas Instruments Incorporated
Inventor： Tony Ray Larson , Dimitar Trifonov Trifonov , Biraja Prasad Dash
CPC classification number: H03F1/26 , H03F3/387 , H03F3/45475 , H03F3/45968 , H03F2200/171 , H03F2200/271 , H03F2200/375 , H03F2200/459
Abstract: Embodiments relate to a chopped amplifier system where a ripple reduction filter placed outside of a main signal path is disclosed. The chopped amplifier system includes a chopped amplifier having an input terminal and an output terminal, where the input terminal receives an input signal and the output terminal provides an output signal including a ripple that is based on an offset voltage of the chopped amplifier. The ripple reduction filter is placed in a feedback loop path that receives a portion of the chopped amplifier's output signal and provides a feedback signal to the chopped amplifier that reduces the ripple at the output of the chopped amplifier. The ripple reduction filter includes a digital controller and other circuits that can handle large disturbances such as large signal slew rate events and large common-mode steps without reducing the effectiveness of the ripple reduction filter in reducing the ripple.
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