Abstract:
A high performance digitalized Programmable Gain Amplifier (PGA). In prior art circuit, a dual-ladder DAC is employed for gain control, the back gate leakage of NMOS resistors in the fine ladder conquers fine ladder nominal current and it produces non-monotonic gain scallop. Two new art design techniques: (1) adaptively control the fine ladder; and (2) use dummy PMOS brunch device leakage compensates for the NMOS resistor device leakage, are proposed so that the non-monotonic scallops are substantially eliminated and 13-bit resolution/accuracy PGA has been achieved.
Abstract:
A system includes a sensor integrated circuit (IC), including a driver adapted to be coupled to an oscillator, the driver including first and second transistors. The sensor IC includes an amplitude control amplifier coupled to the first transistor. The sensor IC also includes a common mode control amplifier coupled to the second transistor. The sensor IC includes a handover control circuit coupled to the amplitude control amplifier and configured to hand off an operation from the sensor IC to a different sensor IC, the handover control circuit including a resistor network coupled to a switch network.
Abstract:
A circuit includes a gain stage, first and second amplifiers, and a comparison circuit. The gain stage has an input and an output. The first amplifier has an input and an output. The input of the first amplifier is coupled to the input of the gain stage. The second amplifier has an input and an output. The input of the second amplifier is coupled to the output of the gain stage. The comparison circuit is coupled to the outputs of the first and second amplifiers. The comparison circuit is configured to compare signals on the outputs of the first and second amplifiers and to generate a fault flag signal responsive to the output signal from the first amplifier being different than the output signal from the second amplifier.
Abstract:
Methods and apparatus providing a smooth transition from a pulse width modulation mode to a linear mode to drive a voice coil motor are disclosed. An example apparatus includes an H-bridge; a pulse generator to generate a pulse when the voice coil motor driver transitions from pulse width modulation mode to linear mode; a first boost circuit to, when the pulse is generated, increase a first current being applied to a first gate of a first transistor in the H-bridge, the increase in the first current enabling the first transistor; and a second boost circuit to, when the pulse is generated, provide an additional path to ground from a node coupled to a second gate of a second transistor of the H bridge, the path to ground corresponding to a voltage drop that disables the second transistor.
Abstract:
An angular resolver system includes, for example, an imbalance detector for detecting degraded resolver output signals. The imbalance detector includes a first and second power averaging circuits and a comparator circuit. The first power averaging circuit includes a first integrator for generating over a first time window a first average power signal in response to resolver sensor output signals. The second power averaging circuit includes a second integrator for generating over a second time window a second average power signal in response to the resolver sensor output signals, where the first time window is longer than the second time window. The comparator circuit compares the first average power signal and the second average power signal and generates a fault signal when the first average power signal and the second average power signal differ by a selected voltage threshold.
Abstract:
A circuit includes a bandpass filter and a self-tracking circuit. The bandpass filter has a first input node configured to receive an input square wave signal and an output node configured to provide an output sine wave signal. The bandpass filter includes a first binary-weighted programmable resistor array. The self-tracking circuit includes a second input node coupled to the output node. The self-tracking circuit includes a counter, and the counter includes an output node coupled to the first binary weighted programmable resistor array.
Abstract:
One embodiment includes a back-electromagnetic force (BEMF) sense system. The system includes a sense amplifier configured to measure an amplitude of a selected one of a plurality of phase voltages relative to a center tap voltage associated with a servo motor for the calculation of an associated BEMF voltage. The plurality of phase voltages can be provided to the sense amplifier via a respective plurality of control nodes. The selected one of the plurality of phase voltages on a respective one of the control nodes can be selected based on coupling the other of the plurality of control nodes associated with the other of the plurality of phase voltages to a voltage source configured to provide a predetermined voltage magnitude.
Abstract:
An integrated circuit includes a motor current input voltage-to-current (VI) converter that receives a motor current sensor voltage from a motor and a reference voltage to generate an output current related to a motor's current. A motor current calibration VI converter compensates for errors in the motor current input VI converter and generates a calibration output current based on the reference voltage, wherein the output current and the calibration output current are combined to form an estimate of the motor's current.
Abstract:
An integrated circuit includes a motor current input voltage-to-current (VI) converter that receives a motor current sensor voltage from a motor and a reference voltage to generate an output current related to a motor's current. A motor current calibration VI converter compensates for errors in the motor current input VI converter and generates a calibration output current based on the reference voltage, wherein the output current and the calibration output current are combined to form an estimate of the motor's current.
Abstract:
An automatic gain control circuit includes a linear-to-log conversion circuit, a current amplifier circuit, and an amplitude sense circuit. The current amplifier circuit includes a current input terminal coupled to an output terminal of the linear-to-log conversion circuit. The amplitude sense circuit includes an input terminal coupled to an output terminal of the current amplifier circuit, and an output terminal coupled to a gain control input terminal of the current amplifier circuit.