公开(公告)号：US20240113716A1

公开(公告)日：2024-04-04

申请号：US17956576

申请日：2022-09-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yogesh DARWHEKAR ,  Abhrarup BARMAN ROY ,  Subhashish MUKHERJEE ,  Peeyoosh MIRAJKAR

IPC: H03K21/08 ,  H03K17/687

CPC classification number: H03K21/08 ,  H03K17/6871

Abstract: In an example, a system includes an N divider coupled to an output of a low dropout regulator. The system also includes a load balancing circuit coupled to the N divider and configured to sink a load balancing current at the output of the low dropout regulator during one or more phases of the N divider. The system includes a switch coupled to the load balancing circuit and configured to connect the load balancing circuit to the output of the low dropout regulator during the one or more phases of the N divider.

公开(公告)号：US20210391866A1

公开(公告)日：2021-12-16

申请号：US17128791

申请日：2020-12-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Srinivas THEERTHAM ,  Jagdish CHAND ,  Yogesh DARWHEKAR ,  Subhashish MUKHERJEE ,  Jayawardan JANARDHANAN ,  Uday Kiran MEDA ,  Arpan Sureshbhai THAKKAR ,  Apoorva BHATIA ,  Pranav KUMAR

IPC: H03L7/23 ,  H03L7/099 ,  H03L7/085 ,  H03M1/66

Abstract: A frequency synthesizer includes a phase-locked loop (PLL). The PLL includes a first voltage-controlled oscillator (VCO) and a second VCO, each comprising an oscillator, a capacitor bank, and a bias circuit. The capacitor bank is configured to selectably adjust an output frequency of the oscillator. The bias circuit is configured to provide a bias current to the oscillator, and includes a current digital-to-analog converter (IDAC), and an amplifier coupled to the IDAC and configured to drive the oscillator.

公开(公告)号：US20190379412A1

公开(公告)日：2019-12-12

申请号：US16361806

申请日：2019-03-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jagdish CHAND ,  Subhashish MUKHERJEE

IPC: H04B1/04 ,  H03F3/24 ,  H03F3/19

Abstract: A radio frequency transmitter includes a digital-to-analog converter (DAC), a load circuit, and a modulator circuit. The load circuit is coupled to an output of the DAC. The modulator circuit is coupled to the DAC and the load circuit. The modulator circuit includes a driver circuit configured to provide a bias voltage to the load circuit, and an amplifier configured to receive an output of the DAC biased by an output of the load circuit.

公开(公告)号：US20170302310A1

公开(公告)日：2017-10-19

申请号：US15486909

申请日：2017-04-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subhashish MUKHERJEE ,  Yogesh DARWHEKAR ,  Nagaraj V. DIXIT ,  Raghu GANESAN

IPC: H04B1/10 ,  H04B17/318 ,  H04B17/345 ,  H04B1/16 ,  H03L7/099 ,  H03G3/20

CPC classification number: H04B1/10 ,  H03G3/3052 ,  H03J7/00 ,  H03L7/087 ,  H03L7/099 ,  H03L7/18 ,  H04B1/123 ,  H04B1/16 ,  H04B17/318

Abstract: At least some embodiments are directed to a receiver system that comprises a first oscillation module configured to provide oscillating signals of differing frequencies and a second oscillation module configured to provide other oscillating signals of the differing frequencies. The second oscillation module is configured to produce less noise than the first oscillation module. A controller is coupled to the first and second oscillation modules and configured to selectively activate and deactivate each of the first and second oscillation modules based on signal strengths of primary signals received via a wireless medium and based on signal strengths of interference signals received via the wireless medium.