Low power ideal diode control circuit

    公开(公告)号:US11079782B2

    公开(公告)日:2021-08-03

    申请号:US16678733

    申请日:2019-11-08

    Abstract: In described examples of a circuit that operates as a low-power ideal diode, and an IC chip that contains the ideal diode circuit, the circuit includes: a first P-channel transistor connected to receive an input voltage on a first terminal and to provide an output voltage on a second terminal; a first amplifier connected to receive the input voltage and the output voltage and to provide a first signal that dynamically biases a gate of the first P-channel transistor as a function of the voltage across the first P-channel transistor; and a second amplifier connected to receive the input voltage and the output voltage and to provide a second signal that acts to turn off the gate of the first P-channel transistor responsive to the input voltage being less than the output voltage.

    RECTIFIER WITH SIGNAL RECONSTRUCTION

    公开(公告)号:US20230006541A1

    公开(公告)日:2023-01-05

    申请号:US17363050

    申请日:2021-06-30

    Abstract: An electronic device has a first circuit, a second circuit, and an isolation circuit, the isolation circuit having an input and an output, the first circuit including a signal generator having an output, the output of the signal generator coupled to the input of the isolation circuit. The second circuit includes a rectifier circuit and a signal detector circuit, the rectifier circuit having a rectifier input coupled to the output of the isolation circuit, and the signal detector circuit having an input coupled to the output of the isolation circuit.

    Large range current mirror
    5.
    发明授权

    公开(公告)号:US10228713B1

    公开(公告)日:2019-03-12

    申请号:US15850072

    申请日:2017-12-21

    Abstract: A current mirror includes a first pair of transistors, wherein gates of the first pair of transistors are connected together, and a second pair of transistors coupled to the first pair of transistors. Gates of the second pair of transistors are connected together. A first resistive device is coupled across a drain and a source of one of the transistors of the second pair of transistors. A second resistive device is coupled across a drain and a source of the other transistor of the second pair of transistors. The first pair of transistors are configured to operate in weak inversion at an input current to the current mirror within a first current range and the second pair of transistors are configured to operate in strong inversion at an input current within a second current range.

    OVERVOLTAGE PROTECTION CIRCUIT FOR USB INTERFACE
    6.
    发明申请
    OVERVOLTAGE PROTECTION CIRCUIT FOR USB INTERFACE 审中-公开
    用于USB接口的过电压保护电路

    公开(公告)号:US20160190794A1

    公开(公告)日:2016-06-30

    申请号:US14969026

    申请日:2015-12-15

    CPC classification number: H02H7/20 H02H9/045 H02H9/048

    Abstract: Protection circuits, USB interface integrated circuits, and methods for protecting host circuitry from USB port pin overvoltages, in which a switch is connected between a USB port pin and a middle node, and a detection circuit compares the middle node voltage with a reference voltage. A control circuit turns off the switch and turns on a clamp circuit to conduct pull down current from the middle node in response to the middle node voltage exceeding the reference voltage to mitigate overvoltage conditions on a host pin coupled to the middle node. When the middle node voltage falls below the reference voltage, the control circuit delays for a predetermined time and then turns off the clamp circuit and turns on the switch.

    Abstract translation: 保护电路,USB接口集成电路和用于保护主机电路免受USB端口引脚过电压的影响,其中开关连接在USB端口引脚和中间节点之间,检测电路将中间节点电压与参考电压进行比较。 控制电路关闭开关并打开钳位电路,以响应于中间节点电压超过参考电压从中间节点传导下拉电流,以减轻耦合到中间节点的主机引脚上的过压状况。 当中间节点电压低于参考电压时,控制电路延迟预定时间,然后关断钳位电路并接通开关。

    FAST CURRENT LIMITING CIRCUIT IN MULTI LOOP LDOS
    7.
    发明申请
    FAST CURRENT LIMITING CIRCUIT IN MULTI LOOP LDOS 有权
    多环路LDOS中的快速电流限制电路

    公开(公告)号:US20150130434A1

    公开(公告)日:2015-05-14

    申请号:US14446563

    申请日:2014-07-30

    CPC classification number: G05F1/575 G05F1/10 G05F1/56

    Abstract: A circuit and method for providing a current limiting feature in a low dropout (“LDO”) linear voltage regulator. A pass element generates an output voltage that is less than the input voltage. The pass element is normally enabled by an error amplifier that compares a feedback signal from the output of the pass element with a reference signal. However, the pass element may be enabled by a current limiting circuit that bypasses the error amplifier to limit the current generated at the output of the pass element.

    Abstract translation: 一种用于在低压差(“LDO”)线性稳压器中提供限流特性的电路和方法。 传递元件产生小于输入电压的输出电压。 通过元件通常由误差放大器使能,该误差放大器将来自通过元件的输出的反馈信号与参考信号进行比较。 然而,通过元件可以通过旁路误差放大器的限流电路使能,以限制在通过元件的输出处产生的电流。

    Switched capacitor circuit with passive charge recycling

    公开(公告)号:US11594959B1

    公开(公告)日:2023-02-28

    申请号:US17515387

    申请日:2021-10-29

    Abstract: A switched capacitor voltage multiplication device has a rectifier with a DC input terminal and a DC output terminal and two pulse input terminals. A first flying capacitor is coupled to one of the pulse input terminals, while a second flying capacitor is coupled to the other pulse input terminal. A recycle resistor is coupled across the rectifier with a first resistor terminal coupled to one pulse input terminal and a second resistor terminal coupled to the other pulse input terminal.

    Multi-input voltage regulator
    9.
    发明授权

    公开(公告)号:US10671105B2

    公开(公告)日:2020-06-02

    申请号:US15913321

    申请日:2018-03-06

    Abstract: An apparatus includes an amplifier configured to compare a feedback input, corresponding to a voltage of an output voltage node, with respect to a reference input and to provide a control output to control the output voltage node based on a difference between the feedback input and the reference input. At least two source circuits are coupled with the output voltage node. Each of the source circuits are configured to provide respective voltage sources to supply electrical power to the output voltage node.

Patent Agency Ranking