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公开(公告)号：US11888447B2
公开(公告)日：2024-01-30
申请号：US17232985
申请日：2021-04-16
Applicant: Texas Instruments Incorporated
CPC classification number: H03F1/0233 , H03F3/45475 , H03F2200/462 , H03F2200/471 , H03F2200/504
Abstract: A circuit includes an operational amplifier having: a positive input; a negative input; an operational amplifier output; a differential front end; a positive channel (PCH) input stage; a negative channel (NCH) input stage; and an output stage. The operational amplifier also includes a current limit circuit coupled to an output of the output stage and including: an output current sense voltage circuit having an output configured to provide an output current sense voltage; an indirect current feedback circuit coupled to the output of the output current sense voltage circuit, the indirect current feedback circuit having an output configured to provide an output current feedback sense voltage responsive to the output current sense voltage; and control circuitry coupled to the indirect current feedback circuit and configured vary a resistance between the output stage output and ground responsive to a difference between the output current feedback sense voltage and a reference voltage.
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公开(公告)号：US20220360239A1
公开(公告)日：2022-11-10
申请号：US17307327
申请日：2021-05-04
Applicant: Texas Instruments Incorporated
Inventor： Vadim Valerievich Ivanov , Munaf Hussain Shaik , Srinivas Kumar Pulijala , Patrick Forster , Jerry Lee Doorenbos
Abstract: Disclosed is a system comprising a plurality of operational amplifiers, each operational amplifier having individually adjustable operational parameters, and a trimming circuit. The trimming circuit includes successive approximation register (SAR) logic that determines associated memory values. The trimming circuit changes the adjustable operational parameters of each operation amplifier based on the associated memory values.
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公开(公告)号：US11347249B2
公开(公告)日：2022-05-31
申请号：US16934334
申请日：2020-07-21
Applicant: Texas Instruments Incorporated
Inventor： Avinash Shreepathi Bhat , Vadim Valerievich Ivanov
Abstract: A linear regulator system is described. The linear regulator system includes a linear regulator core circuit including a pass element adapted to provide an output voltage, and a voltage error amplifier circuit coupled to the pass element and adapted to regulate the output voltage to form a regulated output voltage, based on an output reference voltage. The linear regulator core circuit further includes a current limit circuit comprising a current limit switch element coupled to the voltage error amplifier circuit and adapted to selectively modulate the output reference voltage of the voltage error amplifier circuit to form a current limited reference voltage, based on a current limit control signal received at a current limit control terminal associated therewith, in order to limit a load current through the pass element from exceeding a predefined maximum allowable load current limit.
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公开(公告)号：US11321543B2
公开(公告)日：2022-05-03
申请号：US17179847
申请日：2021-02-19
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov
Abstract: A logarithmic amplifier includes a logarithmic current preamplifier circuit and logarithmic amplifier circuit. The logarithmic current preamplifier circuit includes an inverting input terminal, an output terminal, and a first diode. The first diode is coupled between the inverting input terminal of the logarithmic current preamplifier circuit and the output terminal of the logarithmic current preamplifier circuit. The logarithmic amplifier circuit includes an inverting input terminal, an output terminal, and a second diode. The inverting input terminal of the logarithmic amplifier circuit is coupled to the output terminal of the logarithmic current preamplifier circuit. The second diode is coupled between the inverting input terminal of the logarithmic amplifier circuit and the output terminal of the logarithmic amplifier circuit.
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公开(公告)号：US10956687B1
公开(公告)日：2021-03-23
申请号：US16711694
申请日：2019-12-12
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov
Abstract: A logarithmic amplifier includes a logarithmic current preamplifier circuit and logarithmic amplifier circuit. The logarithmic current preamplifier circuit includes an inverting input terminal, an output terminal, and a first diode. The first diode is coupled between the inverting input terminal of the logarithmic current preamplifier circuit and the output terminal of the logarithmic current preamplifier circuit. The logarithmic amplifier circuit includes an inverting input terminal, an output terminal, and a second diode. The inverting input terminal of the logarithmic amplifier circuit is coupled to the output terminal of the logarithmic current preamplifier circuit. The second diode is coupled between the inverting input terminal of the logarithmic amplifier circuit and the output terminal of the logarithmic amplifier circuit.
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Patent Agency Ranking
公开(公告)号：US20230092097A1
公开(公告)日：2023-03-23
申请号：US17482195
申请日：2021-09-22
Applicant: Texas Instruments Incorporated
Abstract: An example apparatus includes: a folded cascode circuit including a first input terminal, a second input terminal, a first output terminal, and a second output terminal; a first feedback loop including a third output terminal, the third output terminal coupled to the first output terminal; a second feedback loop including a fourth output terminal, the fourth output terminal coupled to the second output terminal; and a first driver including a first control terminal and a fifth output terminal, the first control terminal coupled to the third output terminal; and a second driver including a second control terminal and a sixth output terminal, the second control terminal coupled to the fourth output terminal, the sixth output terminal coupled to the fifth output terminal.
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公开(公告)号：US20210242844A1
公开(公告)日：2021-08-05
申请号：US16777521
申请日：2020-01-30
Applicant: Texas Instruments Incorporated
Inventor： Vadim Valerievich Ivanov , Srinivas Kumar Pulijala
IPC: H03F3/45
Abstract: An apparatus has four transistors. The first and third transistors each have a gate coupled to a first input terminal and second input terminal respectively, a source coupled to a current source and to a first terminal of a bias voltage source, and a substrate coupled to a second terminal of the bias voltage source. The second and fourth transistors each have a gate coupled to the first input terminal and the second input terminal respectively, a source coupled to the drain of the first and third transistors respectively, a drain coupled to a lower voltage supply and a substrate coupled to its source. The bias voltage source increases the threshold voltages of the first and third transistors above the second and fourth transistors, respectively. This ensures that the first and third transistors turn on after the second and fourth transistors, respectively.
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公开(公告)号：US10854308B2
公开(公告)日：2020-12-01
申请号：US16859292
申请日：2020-04-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov
IPC: G11C27/02
Abstract: A sample and hold circuit with long hold time. A sample and hold circuit includes an amplifier, a capacitor, a switch, and a sampling network. The capacitor includes a first terminal coupled to an inverting input of the amplifier. The switch includes a first terminal that is coupled to an output of the amplifier, and a second terminal that is coupled to the inverting input of the amplifier. The sampling network is coupled to a non-inverting input of the amplifier.
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公开(公告)号：US20190107857A1
公开(公告)日：2019-04-11
申请号：US16058022
申请日：2018-08-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Vadim Valerievich Ivanov , Srinivas K. Pulijala , Siva Kumar Sudani
Abstract: A voltage regulator includes a first transistor including a first terminal to receive an input voltage and a second transistor including a first terminal coupled to a second terminal of the first transistor. A charge pump couples to the second transistor and to an output voltage node. An amplifier receives a feedback voltage derived from the output voltage and generates a control signal to gates of the transistors. Responsive to the input voltage being more than a threshold larger than the output voltage, the amplifier maintains the second transistor off and the first transistor on such that current flows through the first transistor to the output voltage node but not the second transistor. Responsive to the input voltage being less than the threshold amount, the amplifier operates the first transistor in a triode mode and turns on the second transistor to provide current to the charge pump.
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公开(公告)号：US20160004269A1
公开(公告)日：2016-01-07
申请号：US14749888
申请日：2015-06-25
Applicant: Texas Instruments Incorporated
Inventor： Vadim Valerievich Ivanov
IPC: G05F3/20
Abstract: Methods and circuits for adjusting the output parameter of a device wherein the output parameter is temperature dependent are disclosed herein. An example of a method includes: adjusting the output parameter to a target level at a first temperature; adjusting a linear temperature-dependent variable related to the output parameter to zero at the first temperature; adjusting a nonlinear temperature-dependent variable related to the output parameter to zero at the first temperature; adjusting the output parameter to the target level at a second temperature using the linear-dependent variable; adjusting the nonlinear temperature-dependent variable to zero at the second temperature; and adjusting the output parameter to the target level at a third temperature by adjusting the nonlinear variable.
Abstract translation: 本文公开了用于调节输出参数是温度依赖性的装置的输出参数的方法和电路。 一种方法的示例包括：在第一温度下将输出参数调整到目标水平; 在第一个温度下将与输出参数相关的线性温度相关变量调整为零; 在第一温度下将与输出参数相关的非线性温度依赖变量调整为零; 使用线性相关变量在第二温度下将输出参数调整到目标水平; 在第二温度下将非线性温度依赖变量调整为零; 并通过调整非线性变量将输出参数调整到第三温度的目标电平。
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