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    Voltage correction in battery voltage monitors
    1.
    发明授权
    Voltage correction in battery voltage monitors 有权

    公开(公告)号：US12032036B2

    公开(公告)日：2024-07-09

    申请号：US17194033

    申请日：2021-03-05

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Vishnu Ravinuthula ,  Takao Oshida ,  Geoffrey Grimmer

    IPC: H02J7/00 ,  G01R31/36 ,  G01R31/396 ,  H03M1/44

    CPC classification number: G01R31/396 ,  G01R31/3648 ,  H02J7/0071 ,  H03M1/44

    Abstract: An apparatus comprises a plurality of analog front ends (AFEs) adapted to be coupled to a plurality of battery cells and configured to decrease voltages received from the plurality of battery cells to produce a plurality of AFE voltages. The apparatus further comprises at least one analog-to-digital converter (ADC) coupled to the plurality of AFEs and configured to convert the plurality of AFE voltages to a plurality of corresponding digital signals. The apparatus also comprises a plurality of digital channel registers coupled to the at least one ADC and configured to store the plurality of digital signals, and a processor coupled to the at least one ADC and configured to adjust, in a round-robin calculation scheme, the plurality of digital signals based on a plurality of common mode voltage values and a plurality of common mode to differential gain values associated with the plurality of AFEs.

    Oscillator circuit with open loop frequency modulation
    2.
    发明授权
    Oscillator circuit with open loop frequency modulation 有权

    公开(公告)号：US12199611B2

    公开(公告)日：2025-01-14

    申请号：US18171413

    申请日：2023-02-20

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Vishnu Ravinuthula ,  Tianyu Chang

    IPC: H03K3/03 ,  H03K3/014 ,  H03K5/135

    Abstract: An oscillator circuit includes a ring oscillator and a ramp generator. The ring oscillator includes a first inverter and a second inverter. The first inverter has and a first inverter input, a first inverter output, and a first power terminal. The second inverter has a second inverter input, a second inverter output, and a second power terminal. The second inverter input is coupled to the first inverter output and the second inverter output is coupled to the first inverter input. The ramp generator circuit has a ramp output coupled to the first power terminal and the second power terminal.

    CONFIGURABLE FREQUENCY-LOCKED LOOP/PHASE-LOCKED LOOP OSCILLATOR
    3.
    发明申请
    CONFIGURABLE FREQUENCY-LOCKED LOOP/PHASE-LOCKED LOOP OSCILLATOR 有权

    公开(公告)号：US20240405778A1

    公开(公告)日：2024-12-05

    申请号：US18326245

    申请日：2023-05-31

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Vishnu Ravinuthula ,  Peng Cao ,  Chienyu Huang

    IPC: H03L7/099

    Abstract: An integrated circuit (IC) includes an oscillator circuit having a control input. A control circuit has a control output coupled to the control input. The control circuit is configured to generate a control signal to the control input of the oscillator circuit to cause: the oscillator circuit to be configured as a frequency-locked loop in response to the control signal being in a first state; and the oscillator circuit to be configured as a phase-locked loop in response to the control signal being in a second state.

    HIGH-SPEED RESISTOR-BASED CHARGE PUMP FOR ACTIVE LOOP FILTER-BASED PHASE-LOCKED LOOPS
    5.
    发明申请
    HIGH-SPEED RESISTOR-BASED CHARGE PUMP FOR ACTIVE LOOP FILTER-BASED PHASE-LOCKED LOOPS 有权
    基于主动环路滤波器的高速基于电阻的充电泵

    公开(公告)号：US20160164405A1

    公开(公告)日：2016-06-09

    申请号：US14961590

    申请日：2015-12-07

    Applicant: Texas Instruments Incorporated

    Inventor： Vishnu Ravinuthula ,  Kenneth George Maclean

    IPC: H02M3/07 ,  H03L7/085

    CPC classification number: H03L7/085 ,  H03L7/0891

    Abstract: Techniques are described for increasing the speed of a resistor-based charge pump for an active loop filter-based phase-locked loop (PLL). The techniques may include placing a low-resistance discharge path between respective nodes of a current source and sink in a charge pump, and selectively activating the low-resistance discharge path when the charge pump is turned off. The low-resistance discharge path may have a resistance that is lower than the resistance of other current paths between the respective nodes in the charge pump (e.g., current paths formed by the resistors included in the current source and sink of the charge pump), thereby reducing the amount of time needed to reset the charge on the respective nodes when the charge pump is turned off. In this way, the speed of a resistor-based charge pump may be increased, thereby allowing the overall speed of an active filter-based PLL to be increased.

    Abstract translation: 描述了用于增加用于基于有源环路滤波器的锁相环（PLL）的基于电阻器的电荷泵的速度的技术。 这些技术可以包括将电流源的各个节点之间的低电阻放电路径放置在电荷泵中，并且在电荷泵关闭时选择性地启动低电阻放电路径。 低电阻放电路径可以具有低于电荷泵中的各个节点之间的其它电流路径的电阻的电阻（例如，由电荷源的电流源和电荷泵中的电阻器形成的电流路径）， 从而减少当电荷泵关闭时复位各个节点上的电荷所需的时间量。 以这种方式，可以增加基于电阻器的电荷泵的速度，从而允许基于有源滤波器的PLL的总体速度增加。

    Self calibration for an analog-to-digital converter
    7.
    发明授权
    Self calibration for an analog-to-digital converter 有权

    公开(公告)号：US12218678B2

    公开(公告)日：2025-02-04

    申请号：US17900445

    申请日：2022-08-31

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Vishnu Ravinuthula

    IPC: H03M1/10 ,  H03M1/00 ,  H03M1/06 ,  H03M1/16

    Abstract: A method for calibrating analog-to-digital conversion includes converting, by an analog-to-digital converter (ADC), a first input voltage to a first digital code. The first input voltage is generated from a reference voltage used as a reference voltage by the ADC. The method includes converting, by the ADC, a second input voltage to a second digital code. The second input voltage is generated from the reference voltage used as the reference voltage by the ADC. The method also includes calculating a calibration factor based on the first digital code, the second digital code, the first input voltage, and the second input voltage, converting, by the ADC, a third voltage to a third digital code, and correcting the third digital code using the calibration factor.

    High-speed resistor-based charge pump for active loop filter-based phase-locked loops
    9.
    发明授权
    High-speed resistor-based charge pump for active loop filter-based phase-locked loops 有权
    基于高速电阻器的电荷泵，用于基于有源环路滤波器的锁相环

    公开(公告)号：US09543969B2

    公开(公告)日：2017-01-10

    申请号：US14961590

    申请日：2015-12-07

    Applicant: Texas Instruments Incorporated

    Inventor： Vishnu Ravinuthula ,  Kenneth George Maclean

    IPC: H03L7/06 ,  H03L7/085

    CPC classification number: H03L7/085 ,  H03L7/0891

    Abstract: Techniques are described for increasing the speed of a resistor-based charge pump for an active loop filter-based phase-locked loop (PLL). The techniques may include placing a low-resistance discharge path between respective nodes of a current source and sink in a charge pump, and selectively activating the low-resistance discharge path when the charge pump is turned off. The low-resistance discharge path may have a resistance that is lower than the resistance of other current paths between the respective nodes in the charge pump (e.g., current paths formed by the resistors included in the current source and sink of the charge pump), thereby reducing the amount of time needed to reset the charge on the respective nodes when the charge pump is turned off. In this way, the speed of a resistor-based charge pump may be increased, thereby allowing the overall speed of an active filter-based PLL to be increased.

    Abstract translation: 描述了用于增加用于基于有源环路滤波器的锁相环（PLL）的基于电阻器的电荷泵的速度的技术。 这些技术可以包括将电流源的各个节点之间的低电阻放电路径放置在电荷泵中，并且在电荷泵关闭时选择性地启动低电阻放电路径。 低电阻放电路径可以具有低于电荷泵中的各个节点之间的其它电流路径的电阻的电阻（例如，由电荷源的电流源和电荷泵中的电阻器形成的电流路径）， 从而减少当电荷泵关闭时复位各个节点上的电荷所需的时间量。 以这种方式，可以增加基于电阻器的电荷泵的速度，从而允许基于有源滤波器的PLL的总体速度增加。

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