公开(公告)号：US20050233536A1

公开(公告)日：2005-10-20

申请号：US11153062

申请日：2005-06-15

Applicant: Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

Inventor： Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

IPC: H01L21/331 ,  H01L29/06 ,  H01L29/08 ,  H01L29/737

CPC classification number: H01L29/66287 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/167 ,  H01L29/66242 ,  H01L29/7371 ,  H01L29/7378

Abstract: The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first conductivity type, which is embedded therein and is bare towards the top. A monocrystalline base area is provided and a base-connecting area of the second conductivity type is provided above the base area. An insulating area is provided above the base-connecting area and a window is formed in the insulating area and the base-connecting area so as to at least partly expose the base area. An insulating sidewall spacer is provided in the window in order to insulate the base-connecting area. An emitter layer which forms a monocrystalline emitter area above the base area and a polycrystalline emitter area above the insulating area and the sidewall spacer is differentially deposited and structured, and a tempering step is carried out.

Abstract translation: 本发明涉及一种制造双极晶体管的方法。 提供了一种半导体衬底，其包含嵌入其中并且朝向顶部裸露的第一导电类型的集电极区域。 提供单晶基底区域，并且在基底区域上方设置第二导电类型的基底连接区域。 绝缘区域设置在基底连接区域上方，并且在绝缘区域和基底连接区域中形成窗口，以便至少部分地暴露基部区域。 在窗口中设置绝缘侧壁间隔件，以便使基部连接区域绝缘。 在绝缘区域之上形成单晶发射极区域和绝缘区域上方的多晶发射极区域的发射极层被差异地沉积和结构化，并进行回火步骤。

公开(公告)号：US06867105B2

公开(公告)日：2005-03-15

申请号：US10215152

申请日：2002-08-08

Applicant: Reinhard Stengl ,  Thomas Meister ,  Herbert Schäfer ,  Martin Franosch

Inventor： Reinhard Stengl ,  Thomas Meister ,  Herbert Schäfer ,  Martin Franosch

IPC: H01L21/331 ,  H01L29/732

CPC classification number: H01L29/66287 ,  H01L29/7322

Abstract: A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third layer is formed with an emitter cutout for an emitter. An undercut is formed in the second layer adjoining the base cutout. The base is at least partially located in the undercut. In order to obtain a low transition resistance between the lead and the base, an intermediate layer is provided between the first and the second layer. The intermediate layer is selectively etchable with respect to the second layer. At least in the region of the undercut between the lead and the base, a base connection zone is provided that can be adjusted independent of other production conditions. The intermediate layer is removed in a contact region with the base.

Abstract translation: 双极晶体管包括具有集电极的第一层。 第二层具有用于基座的基部切口。 第三层包括用于底座的引线。 第三层形成有用于发射极的发射极切口。 在与基座切口相邻的第二层中形成底切。 基部至少部分位于底切中。 为了在引线和基底之间获得低的过渡电阻，在第一和第二层之间设置中间层。 中间层相对于第二层可选择性地蚀刻。 至少在引线和基座之间的底切区域中，提供可以独立于其他生产条件进行调节的基础连接区域。 在与基底的接触区域中去除中间层。

公开(公告)号：US07612430B2

公开(公告)日：2009-11-03

申请号：US10297421

申请日：2001-06-15

Applicant: Martin Franosch ,  Thomas Meister ,  Herbert Schäfer ,  Reinhard Stengl ,  Konrad Wolf

Inventor： Martin Franosch ,  Thomas Meister ,  Herbert Schäfer ,  Reinhard Stengl ,  Konrad Wolf

IPC: H01L29/732

CPC classification number: H01L29/1004

Abstract: The silicon bipolar transistor (100) comprises a base, with a first highly-doped base layer (105) and a second poorly-doped base layer (106) which together form the base. The emitter is completely highly-doped and mounted directly on the second base layer (106).

Abstract translation: 硅双极晶体管（100）包括具有一起形成基极的第一高掺杂基极层（105）和第二较差掺杂的基极层（106）的基极。 发射极是完全高度掺杂的，直接安装在第二基极层（106）上。

公开(公告)号：US20080227261A1

公开(公告)日：2008-09-18

申请号：US12051928

申请日：2008-03-20

Applicant: Josef Bock ,  Rudolf Lachner ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer ,  Martin Seck

Inventor： Josef Bock ,  Rudolf Lachner ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer ,  Martin Seck

IPC: H01L21/331

CPC classification number: H01L29/66272 ,  H01L21/8222 ,  H01L27/0825 ,  H01L29/0821

Abstract: The invention relates to a method for fabricating a transistor structure, comprising at least a first and a second bipolar transistor having different collector widths.The invention is distinguished by the fact that all junctions between differently doped regions have a sharp interface. In this case, by way of example, a first collector region 2.1 is suitable for a high-frequency transistor with high limiting frequencies fT and a second collector region 2.2 is suitable for a high-voltage transistor with increased breakdown voltages.

Abstract translation: 本发明涉及一种用于制造晶体管结构的方法，该方法至少包括具有不同集电极宽度的第一和第二双极晶体管。 本发明的区别在于，不同掺杂区域之间的所有结点都具有尖锐的界面。 在这种情况下，作为示例，第一集电极区域2.1适用于具有高限制频率f T T的高频晶体管，并且第二集电极区域2.2适用于具有 增加击穿电压。

公开(公告)号：US07105415B2

公开(公告)日：2006-09-12

申请号：US11153062

申请日：2005-06-15

Applicant: Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

Inventor： Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

IPC: H01L21/8222

CPC classification number: H01L29/66287 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/167 ,  H01L29/66242 ,  H01L29/7371 ,  H01L29/7378

Abstract: The invention relates to a method for producing a bipolar transistor. A semiconductor substrate is provided that encompasses a collector area of a first conductivity type, which is embedded therein and is bare towards the top. A monocrystalline base area is provided and a base-connecting area of the second conductivity type is provided above the base area. An insulating area is provided above the base-connecting area and a window is formed in the insulating area and the base-connecting area so as to at least partly expose the base area. An insulating sidewall spacer is provided in the window in order to insulate the base-connecting area. An emitter layer which forms a monocrystalline emitter area above the base area and a polycrystalline emitter area above the insulating area and the sidewall spacer is differentially deposited and structured, and a tempering step is carried out.

Abstract translation: 本发明涉及一种制造双极晶体管的方法。 提供了一种半导体衬底，其包含嵌入其中并且朝向顶部裸露的第一导电类型的集电极区域。 提供单晶基底区域，并且在基底区域上方设置第二导电类型的基底连接区域。 绝缘区域设置在基底连接区域上方，并且在绝缘区域和基底连接区域中形成窗口，以便至少部分地暴露基部区域。 在窗口中设置绝缘侧壁间隔件，以便使基部连接区域绝缘。 在绝缘区域之上形成单晶发射极区域和绝缘区域上方的多晶发射极区域的发射极层被差异地沉积和结构化，并进行回火步骤。

公开(公告)号：US07420228B2

公开(公告)日：2008-09-02

申请号：US11246420

申请日：2005-10-07

Applicant: Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

Inventor： Josef Bock ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schafer

IPC: H01L29/739

CPC classification number: H01L29/66287 ,  H01L29/0821 ,  H01L29/167 ,  H01L29/66242 ,  H01L29/732 ,  H01L29/7378

Abstract: A bipolar transistor comprising a collector region of a first conduction type, and a subcollector region of the first conduction type at a first side of the collector region. The transistor further includes a base region of the second conduction type provided at a second side of the collector region, and an emitter region of the first conduction type which is provided above the base region on the side remote from the collection region. A carbon-doped semiconductor region is provided on the first side alongside the collector region. The bipolar transistor is characterized in that the carbon-doped semiconductor region has a carbon concentration of 1019-1021 cm−3 and the base region has a smaller cross section than the collector region and the collector region has, in the overlap region with the base region, a region having an increased doping compared with the remaining region. The carbon-doped semiconductor region prevents an outdiffusion from the zone of the collector region into the remaining region of the collector region.

Abstract translation: 包括第一导电类型的集电极区域和在集电极区域的第一侧的第一导电类型的子集电极区域的双极晶体管。 晶体管还包括设置在集电极区域的第二侧的第二导电类型的基极区域和设置在远离收集区域的一侧的基极区域上方的第一导电类型的发射极区域。 在集电极区域旁边的第一侧设置碳掺杂半导体区域。 双极晶体管的特征在于，碳掺杂半导体区域的碳浓度为10〜20±0.01cm -3，基极 区域具有比集电极区域更小的横截面，并且在与基极区域的重叠区域中具有与剩余区域相比具有增加的掺杂的区域。 碳掺杂半导体区域防止从集电极区域向集电极区域的剩余区域的扩散。

公开(公告)号：US20050006723A1

公开(公告)日：2005-01-13

申请号：US10912344

申请日：2004-08-04

Applicant: Reinhard Stengl ,  Thomas Meister ,  Herbert Schafer ,  Martin Franosch

Inventor： Reinhard Stengl ,  Thomas Meister ,  Herbert Schafer ,  Martin Franosch

IPC: H01L21/331 ,  H01L29/732 ,  H01L31/0328

CPC classification number: H01L29/66287 ,  H01L29/7322

Abstract: A bipolar transistor includes a first layer with a collector. A second layer has a base cutout for a base. A third layer includes a lead for the base. The third layer is formed with an emitter cutout for an emitter. An undercut is formed in the second layer adjoining the base cutout. The base is at least partially located in the undercut. In order to obtain a low transition resistance between the lead and the base, an intermediate layer is provided between the first and the second layer. The intermediate layer is selectively etchable with respect to the second layer. At least in the region of the undercut between the lead and the base, a base connection zone is provided that can be adjusted independent of other production conditions. The intermediate layer is removed in a contact region with the base.

Abstract translation: 双极晶体管包括具有集电极的第一层。 第二层具有用于基座的基部切口。 第三层包括用于底座的引线。 第三层形成有用于发射极的发射极切口。 在与基座切口相邻的第二层中形成底切。 基部至少部分位于底切中。 为了在引线和基底之间获得低的过渡电阻，在第一和第二层之间设置中间层。 中间层相对于第二层可选择性地蚀刻。 至少在引线和基座之间的底切区域中，提供可以独立于其他生产条件进行调节的基础连接区域。 在与基底的接触区域中去除中间层。

公开(公告)号：US5432120A

公开(公告)日：1995-07-11

申请号：US154551

申请日：1993-11-19

Applicant: Thomas Meister ,  Reinhard Stengl

Inventor： Thomas Meister ,  Reinhard Stengl

IPC: C30B25/04 ,  C30B33/12 ,  H01L21/20 ,  H01L21/205 ,  H01L21/331 ,  H01L21/336

CPC classification number: H01L29/66287 ,  C30B25/04 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02639 ,  H01L29/66651

Abstract: For producing a laterally limited, single-crystal region on a substrate, for example the collector of a bipolar transistor or the active region of a MOS transistor, a mask layer having an opening is produced on the surface of a substrate. The surface of the substrate is exposed within the opening. The cross-section of the opening parallel to the surface of the substrate at the surface of the substrate projects laterally beyond that cross-section at the surface of the mask layer. The sidewall of the opening proceeds essentially perpendicularly relative to the surface of the substrate in the region of the surface of the mask layer and has a step-shaped profile in cross-section perpendicularly relative to the surface of the substrate. The single-crystal region is formed by selective epitaxy within the opening.

Abstract translation: 为了在衬底上产生横向受限的单晶区域，例如双极晶体管的集电极或MOS晶体管的有源区，在衬底的表面上产生具有开口的掩模层。 衬底的表面暴露在开口内。 在衬底表面处平行于衬底表面的开口的横截面横向突出超过掩模层表面处的横截面。 开口的侧壁在掩模层的表面的区域中基本上相对于衬底的表面垂直地延伸，并且具有相对于衬底的表面垂直的横截面的阶梯形轮廓。 单晶区域通过开口内的选择性外延形成。

公开(公告)号：US08003475B2

公开(公告)日：2011-08-23

申请号：US12051928

申请日：2008-03-20

Applicant: Josef Böck ,  Rudolf Lachner ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schäfer ,  Martin Seck

Inventor： Josef Böck ,  Rudolf Lachner ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schäfer ,  Martin Seck

IPC: H01L21/331

CPC classification number: H01L29/66272 ,  H01L21/8222 ,  H01L27/0825 ,  H01L29/0821

Abstract: A method for fabricating a transistor structure with a first and a second bipolar transistor having different collector widths is presented. The method includes providing a semiconductor substrate, introducing a first buried layer of the first bipolar transistor and a second buried layer of the second bipolar transistor into the semiconductor substrate, and producing at least a first collector region having a first collector width on the first buried layer and a second collector region having a second collector width on the second buried layer. A first collector zone having a first thickness is produced on the second buried layer for production of the second collector width. A second collector zone having a second thickness is produced on the first collector zone. At least one insulation region is produced that isolates at least the collector regions from one another.

Abstract translation: 提出了一种制造具有不同集电极宽度的第一和第二双极晶体管的晶体管结构的方法。 该方法包括提供半导体衬底，将第一双极晶体管的第一掩埋层和第二双极晶体管的第二掩埋层引入到半导体衬底中，并且至少在第一掩埋层上产生具有第一集电极宽度的第一集电极区域 层和在第二掩埋层上具有第二集电极宽度的第二集电极区。 在第二掩埋层上产生具有第一厚度的第一收集器区，用于产生第二收集器宽度。 在第一收集器区域上产生具有第二厚度的第二收集器区域。 产生至少一个绝缘区域，其至少隔离收集器区域彼此。

公开(公告)号：US07968972B2

公开(公告)日：2011-06-28

申请号：US12716692

申请日：2010-03-03

Applicant: Josef Böck ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schäfer

Inventor： Josef Böck ,  Thomas Meister ,  Reinhard Stengl ,  Herbert Schäfer

IPC: H01L29/73

CPC classification number: H01L29/66272 ,  H01L29/0821 ,  H01L29/41708 ,  H01L29/732

Abstract: A high-frequency bipolar transistor includes an emitter contact adjoining an emitter connection region, a base contact adjoining a base connection region, and a collector contact adjoining a collector connection region. A first insulation layer is disposed on the base connection region. The collector connection region contains a buried layer, which connects the collector contact to a collector zone. A silicide or salicide region is provided on the buried layer and connects the collector contact to the collector zone in a low-impedance manner. A second insulation layer is disposed on the collector connection region but not on the silicide region.

Abstract translation: 高频双极晶体管包括邻接发射极连接区域的发射极接触件，邻接基极连接区域的基极接触件和邻接集电极连接区域的集电极接触件。 第一绝缘层设置在基底连接区域上。 集电极连接区域包含埋设层，该埋层将集电极触点连接到集电区。 在掩埋层上提供硅化物或自对准硅化物区域，并以低阻抗方式将集电极触点连接到集电极区域。 第二绝缘层设置在集电极连接区域上，但不在硅化物区域上。