公开(公告)号：US6010768A

公开(公告)日：2000-01-04

申请号：US854683

申请日：1997-05-12

申请人： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

发明人： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

IPC分类号： H05K3/00 ,  H05K3/38 ,  H05K3/46 ,  B32B3/00

CPC分类号： H05K3/4661 ,  H05K3/0094 ,  H05K3/4602 ,  H05K2201/0129 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0773 ,  H05K3/382 ,  H05K3/384 ,  Y10S428/901 ,  Y10T428/24893 ,  Y10T428/24917 ,  Y10T428/252

摘要： It is to provide a multilayer printed circuit board having excellent resolution, interlaminar insulation property and resistance to cool-heat shock without forming unevenness on the surface and lowering peel strength even if the thickness of the resin insulating layer is thin. The invention proposes a multilayer printed circuit board comprising an upper conductor circuit layer, a lower conductor circuit layer and a resin insulating layer electrically insulating both the conductor circuit layers, in which the resin insulating layer is a composite layer comprised of an layer made from a heat-resistant resin hardly soluble in acid or oxidizing agent as a lower layer and an adhesive layer for electroless plating made from a heat-resistant resin as an upper layer, and if necessary, a resin is filled in a concave portion created between conductor insulating circuits of the lower layer so as to render the surface into the same plane as the surface of the conductor circuit.

摘要翻译： 提供一种具有优异的分辨率，层间绝缘性和耐冷热冲击性的多层印刷电路板，而不会在表面上形成不均匀性，并且即使树脂绝缘层的厚度薄，也降低剥离强度。 本发明提出了一种多层印刷电路板，包括上导体电路层，下导体电路层和电绝缘两个导体电路层的树脂绝缘层，其中树脂绝缘层是由由 耐热树脂难溶于作为下层的酸或氧化剂以及由耐热树脂作为上层制成的用于化学镀的粘合剂层，如果需要，树脂填充在导体绝缘 电路，以使表面进入与导体电路的表面相同的平面。

公开(公告)号：US06251502B1

公开(公告)日：2001-06-26

申请号：US09357659

申请日：1999-07-20

申请人： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

发明人： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

IPC分类号： B32B300

CPC分类号： H05K3/4661 ,  H05K3/0094 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4602 ,  H05K2201/0129 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0773 ,  Y10S428/901 ,  Y10T428/24893 ,  Y10T428/24917 ,  Y10T428/252

摘要： It is to provide a multilayer printed circuit board having excellent resolution, interlaminar insulation property and resistance to cool-heat shock without forming unevenness on the surface and lowering peel strength even if the thickness of the resin insulating layer is thin. The invention proposes a multilayer printed circuit board comprising an upper conductor circuit layer, a lower conductor circuit layer and a resin insulating layer electrically insulating both the conductor circuit layers, in which the resin insulating layer is a composite layer comprised of an layer made from a heat-resistant resin hardly soluble in acid or oxidizing agent as a lower layer and an adhesive layer for electroless plating made from a heat-resistant resin as an upper layer, and if necessary, a resin is filled in a concave portion created between conductor insulating circuits of the lower layer so as to render the surface into the same plane as the surface of the conductor circuit.

摘要翻译： 提供一种具有优异的分辨率，层间绝缘性和耐冷热冲击性的多层印刷电路板，而不会在表面上形成不均匀性，并且即使树脂绝缘层的厚度薄，也降低剥离强度。 本发明提出了一种多层印刷电路板，包括上导体电路层，下导体电路层和电绝缘两个导体电路层的树脂绝缘层，其中树脂绝缘层是由由 耐热树脂难溶于作为下层的酸或氧化剂以及由耐热树脂作为上层制成的用于化学镀的粘合剂层，如果需要，树脂填充在导体绝缘 电路，以使表面进入与导体电路的表面相同的平面。

公开(公告)号：US06217988B1

公开(公告)日：2001-04-17

申请号：US09432080

申请日：1999-11-02

申请人： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

发明人： Toshihiko Yasue ,  Yasuji Hiramatsu ,  Hideki Yano ,  Yoshifumi Ishitani ,  Yoichiro Kawamura ,  Hideki Murase ,  Ayumi Suzuki ,  Masato Kawade ,  Motoo Asai

IPC分类号： B32B300

CPC分类号： H05K3/4661 ,  H05K3/0094 ,  H05K3/382 ,  H05K3/384 ,  H05K3/4602 ,  H05K2201/0129 ,  H05K2201/0195 ,  H05K2201/0209 ,  H05K2201/0212 ,  H05K2201/0347 ,  H05K2201/09536 ,  H05K2201/0959 ,  H05K2201/09881 ,  H05K2203/0773 ,  Y10S428/901 ,  Y10T428/24893 ,  Y10T428/24917 ,  Y10T428/252

摘要： It is to provide a multilayer printed circuit board having excellent resolution, interlaminar insulation property and resistance to cool-heat shock without forming unevenness on the surface and lowering peel strength even if the thickness of the resin insulating layer is thin. The invention proposes a multilayer printed circuit board comprising an upper conductor circuit layer, a lower conductor circuit layer and a resin insulating layer electrically insulating both the conductor circuit layers, in which the resin insulating layer is a composite layer comprised of an layer made from a heat-resistant resin hardly soluble in acid or oxidizing agent as a lower layer and an adhesive layer for electroless plating made from a heat-resistant resin as an upper layer, and if necessary, a resin is filled in a concave portion created between conductor insulating circuits of the lower layer so as to render the surface into the same plane as the surface of the conductor circuit.