公开(公告)号：US20130337622A1

公开(公告)日：2013-12-19

申请号：US13971763

申请日：2013-08-20

Applicant: United Microelectronics Corp.

Inventor： Chan-Lon Yang ,  Ching-Nan Hwang ,  Chi-Heng Lin ,  Chun-Yao Yang ,  Ger-Pin Lin ,  Ching-I Li

IPC: H01L49/02

CPC classification number: H01L28/24 ,  H01L21/26593 ,  H01L21/32155 ,  H01L21/76224 ,  H01L27/0629 ,  H01L28/20

Abstract: A semiconductor process is provided, including following steps. A polysilicon layer is formed on a substrate. An asymmetric dual-side heating treatment is performed to the polysilicon layer, wherein a power for a front-side heating is different from a power for a backside heating.

Abstract translation: 提供半导体工艺，包括以下步骤。 在基板上形成多晶硅层。 对多晶硅层进行不对称双面加热处理，其中用于正面加热的功率不同于用于背面加热的功率。

公开(公告)号：US09431239B1

公开(公告)日：2016-08-30

申请号：US14809278

申请日：2015-07-26

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chiu-Te Lee ,  Ke-Feng Lin ,  Nien-Chung Li ,  Ching-Nan Hwang ,  Shih-Teng Huang ,  Ming-Yen Liu

IPC: H01L21/02 ,  H01L21/225 ,  H01L21/311 ,  H01L21/283 ,  H01L29/66 ,  H01L29/78 ,  H01L29/06 ,  H01L29/167 ,  H01L29/49 ,  H01L29/423

CPC classification number: H01L21/02238 ,  H01L21/02255 ,  H01L21/2253 ,  H01L21/283 ,  H01L21/31111 ,  H01L21/823462 ,  H01L21/823493 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/1079 ,  H01L29/167 ,  H01L29/4236 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/78

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a doped region in the substrate; forming a thermal oxide layer on the substrate and the doped region; removing the thermal oxide layer to form a first recess; forming an epitaxial layer on the substrate and in the first recess; and forming a gate dielectric layer in the epitaxial layer.

Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤：提供衬底; 在衬底中形成掺杂区域; 在衬底和掺杂区上形成热氧化层; 去除热氧化物层以形成第一凹槽; 在所述基板和所述第一凹部中形成外延层; 以及在所述外延层中形成栅极电介质层。

公开(公告)号：US20150104914A1

公开(公告)日：2015-04-16

申请号：US14551922

申请日：2014-11-24

Applicant: United Microelectronics Corp.

Inventor： Chan-Lon Yang ,  Ching-Nan Hwang ,  Chi-Heng Lin ,  Chun-Yao Yang ,  Ger-Pin Lin ,  Ching-I Li

IPC: H01L21/265 ,  H01L21/02 ,  H01L21/3215 ,  H01L49/02 ,  H01L27/06

CPC classification number: H01L21/26593 ,  H01L21/02532 ,  H01L21/32155 ,  H01L21/324 ,  H01L21/76224 ,  H01L27/0629 ,  H01L28/20

Abstract: A semiconductor process is provided, including following steps. A polysilicon layer is formed on a substrate. The polysilicon layer is cryo-implanted with at least two of multiple species including a germanium species, a carbon species and a p- or n-type species, at a temperature ranging between −40° C. and −120° C. An asymmetric dual-side heating treatment is performed to the polysilicon layer, wherein a power for a front-side heating is different from a power for a backside heating.

Abstract translation: 提供半导体工艺，包括以下步骤。 在基板上形成多晶硅层。 多晶硅层在-40℃至-120℃的温度范围内用至少两种多种物质进行低温注入，包括锗物质，碳物质和p型或n型物质。不对称 对多晶硅层进行双面加热处理，其中用于正面加热的功率与用于背面加热的功率不同。