公开(公告)号：US20140017854A1

公开(公告)日：2014-01-16

申请号：US14030058

申请日：2013-09-18

Applicant: XINTEC INC.

Inventor： Ching-Yu NI ,  Chang-Sheng HSU

IPC: H01L21/78

CPC classification number: H01L21/78 ,  B81B7/0051 ,  B81C2203/0118 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/481 ,  H01L23/585 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L24/93 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/16 ,  H01L27/14618 ,  H01L27/14683 ,  H01L2224/0231 ,  H01L2224/02313 ,  H01L2224/02371 ,  H01L2224/02377 ,  H01L2224/0239 ,  H01L2224/0401 ,  H01L2224/11002 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/13022 ,  H01L2224/13024 ,  H01L2224/2732 ,  H01L2224/27618 ,  H01L2224/29082 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/83005 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2224/95 ,  H01L2224/95001 ,  H01L2924/14 ,  H01L2924/1461 ,  H01L2224/83 ,  H01L2224/11 ,  H01L2924/3512 ,  H01L2924/00

Abstract: A chip package and a fabrication method thereof are provided according to an embodiment of the invention. The chip package contains a semiconductor substrate having a chip. A packaging layer is disposed over the semiconductor substrate. A spacer is disposed between the semiconductor substrate and the packaging layer, wherein a side surface consisting of the semiconductor substrate, the spacer and the packaging layer has a recess section. The method includes forming a plurality of spacers between a plurality of chips of a semiconductor wafer and a packaging layer, wherein each spacer corresponding to each chip is separated from each other and the spacer is shrunk inward from an edge of the chip to form a recess section and dicing the semiconductor wafer along a scribe line between any two adjacent chips to form a plurality of chip packages.

Abstract translation: 根据本发明的实施例提供了芯片封装及其制造方法。 芯片封装包含具有芯片的半导体衬底。 封装层设置在半导体衬底上。 间隔件设置在半导体衬底和封装层之间，其中由半导体衬底，间隔件和封装层组成的侧表面具有凹部。 该方法包括在半导体晶片的多个芯片和封装层之间形成多个间隔物，其中对应于每个芯片的每个间隔件彼此分离，并且间隔件从芯片的边缘向内收缩以形成凹部 并且沿着任何两个相邻芯片之间的划线切割半导体晶片以形成多个芯片封装。