Electron beam irradiation apparatus, electron beam irradiation method, original disk, stamper, and recording medium
    1.
    发明授权
    Electron beam irradiation apparatus, electron beam irradiation method, original disk, stamper, and recording medium 失效
    电子束照射装置,电子束照射方法,原盘,压模和记录介质

    公开(公告)号:US07034319B2

    公开(公告)日:2006-04-25

    申请号:US09789943

    申请日:2001-02-28

    IPC分类号: C23F1/00

    摘要: An electron beam irradiation apparatus, includes a support section for supporting an electron beam irradiation subject to be irradiated with an electron beam, and an electron beam irradiation head opposed to the electron beam irradiation subject via a minute space, the electron beam irradiation head having an electron beam emission hole for irradiating the electron beam irradiation subject with the electron beam. In the electron beam irradiation head, an electron beam path communicating with the electron beam emission hole is provided, and in addition one or more ring shaped gas suction grooves opened from a surface of the electron beam irradiation head facing the electron beam irradiation subject is formed around the electron beam emission hole. Vacuum pumps are coupled to the electron beam path and the ring shaped gas suction grooves, and the electron beam path is held in a high vacuum state.

    摘要翻译: 一种电子束照射装置,包括用于支撑电子束照射对象被照射电子束的支撑部分和经由微小空间与电子束照射物体相对的电子束照射头,该电子束照射头具有 用于用电子束照射电子束照射对象的电子束发射孔。 在电子束照射头中,设置与电子束发射孔连通的电子束路径,并且形成从面向电子束照射对象的电子束照射头的表面开口的一个或多个环形气体吸引槽 围绕电子束发射孔。 真空泵耦合到电子束路径和环形气体吸入槽,并且电子束路径保持在高真空状态。

    Optical recording medium manufacturing master recording apparatus
    2.
    发明授权
    Optical recording medium manufacturing master recording apparatus 失效
    光记录介质制造主记录装置

    公开(公告)号:US06438074B1

    公开(公告)日:2002-08-20

    申请号:US09375658

    申请日:1999-08-17

    IPC分类号: G11B1100

    CPC分类号: G11B7/261

    摘要: A master recording apparatus includes a revolving base (31) for revolving a substrate (1) coated with resist thereon, an irradiating mechanism (32), an elevator mechanism (33) for making the irradiating mechanism (32) capable of moving in a vertical direction and in a surface direction which is perpendicular to the vertical direction relative to the revolving base (31) and a height position displacement mechanism (35) interposing between the irradiating mechanism (32) and the elevator mechanism (33), and in which the irradiating mechanism (32) is connected with the elevator mechanism (33) through the height position displacement mechanism (35) and the irradiating mechanism (32) has such a structure in which at least a converging lens system (36) and a displacement driving mechanism (37) for adjusting a focus are supported by a gas static pressure pad housing (38), in the gas static pressure pad housing (38) a gas feeding pad (39) is disposed facing a bottom surface opposing the substrate and gas is made to be fed between the irradiating mechanism (32) and the said substrate (1) through the gas feeding pad (39), whereby the contact between the substrate and the irradiating mechanism is avoided at a time of carrying out a recording of a predetermined pattern by irradiating a beam.

    摘要翻译: 主记录装置包括用于旋转涂覆有抗蚀剂的基板(1)的旋转基座(31),照射机构(32),用于使照射机构(32)能够垂直移动的升降机构(33) 方向和相对于旋转基座31垂直于垂直方向的表面方向和位于照射机构32和升降机构33之间的高度位置偏移机构35,其中, 照射机构(32)通过高度位置移动机构(35)与升降机构(33)连接,照射机构(32)具有至少会聚透镜系统(36)和位移驱动机构 用于调节焦点的调色剂(37)由气体静压垫壳体(38)支撑,在气体静压垫壳体(38)中,气体供给垫(39)被设置为面向与基体 te和气体通过气体供给垫(39)被供给到照射机构(32)和所述基板(1)之间,从而在执行基板和照射机构时避免基板和照射机构之间的接触 通过照射光束来记录预定图案。

    SEMICONDUCTOR INTEGRATED DEVICE AND CONTROL METHOD THEREOF
    4.
    发明申请
    SEMICONDUCTOR INTEGRATED DEVICE AND CONTROL METHOD THEREOF 有权
    半导体集成器件及其控制方法

    公开(公告)号:US20110102027A1

    公开(公告)日:2011-05-05

    申请号:US12884973

    申请日:2010-09-17

    IPC分类号: H03L7/00

    CPC分类号: G06F1/10 G06F1/24

    摘要: Provided is a semiconductor integrated device that selects one or more of a plurality of functional blocks and resets the selected functional block, and a control method of the semiconductor integrated device. The semiconductor integrated circuit includes a functional block that is reset when a clock signal and a reset signal are supplied, a reset signal output unit that outputs the reset signal for resetting the functional block, a clock mask circuit that stops the clock signal to be supplied to the functional block, and a clock mask control circuit that controls the clock mask circuit.

    摘要翻译: 提供一种半导体集成器件,其选择多个功能块中的一个或多个并复位所选择的功能块,以及半导体集成器件的控制方法。 半导体集成电路包括在提供时钟信号和复位信号时复位的功能块,输出用于复位功能块的复位信号的复位信号输出单元,停止提供时钟信号的时钟屏蔽电路 功能块,以及控制时钟屏蔽电路的时钟屏蔽控制电路。

    Memory control circuit, microcomputer, and data rewriting method
    5.
    发明申请
    Memory control circuit, microcomputer, and data rewriting method 有权
    存储器控制电路,微机和数据重写方法

    公开(公告)号:US20070297237A1

    公开(公告)日:2007-12-27

    申请号:US11808063

    申请日:2007-06-06

    IPC分类号: G11C11/34 G11C16/06

    CPC分类号: G11C16/34

    摘要: A memory control circuit according to an embodiment of the present invention includes: a writable/readable memory; a comparison unit comparing write data to write in the memory with read data that is read from a memory address where the write data is written; a comparison result storage unit storing a comparison result compared by the comparison unit in association with the memory address; and a control unit controlling retry processing of rewriting the write data to the memory address determined to be unverified based on the stored comparison result.

    摘要翻译: 根据本发明的实施例的存储器控​​制电路包括:可写/可读存储器; 比较单元将写入数据与存储器中的写入数据进行比较,读取数据从写入数据的存储器地址读取; 比较结果存储单元,存储比较单元与存储器地址相关联的比较结果; 以及控制单元,其基于所存储的比较结果,控制将写入数据重写为被确定为未验证的存储器地址的重试处理。

    Boiling water type nuclear reactor core and operation method thereof
    6.
    发明授权
    Boiling water type nuclear reactor core and operation method thereof 失效
    沸水型核反应堆堆芯及其运行方法

    公开(公告)号:US06205196B1

    公开(公告)日:2001-03-20

    申请号:US09048994

    申请日:1998-03-27

    IPC分类号: G21C334

    CPC分类号: G21C7/113 Y02E30/31 Y02E30/39

    摘要: A boiling water type nuclear reactor core, in which a plurality of fuel assemblies, each enclosed in a channel box, are loaded and a plurality of control rods, each having control blades, are arranged between the channel boxes. Latitudinal long blade control rods, each having control rod blades which extend latitudinally in four directions, are arranged between channel boxes on diagonals of square bundle regions each formed by a plurality of fuel assemblies, and latitudinal short blade control rods, each having control rod blades which extend latitudinally in four directions with each control rod blade having a latitudinal length of about half of the width of one of the square bundle regions, are arranged between the channel boxes in the center of each of the square bundle regions. The long blade control rods have a latitudinal blade length which is about twice as long as the latitudinal blade length of the short blade control rods.

    摘要翻译: 沸水型核反应堆核心,其中装有封闭在通道箱中的多个燃料组件,并且在通道箱之间设置有多个控制杆,每个控制杆具有控制叶片。 横向长叶片控制棒,每个具有沿四个方向纬向延伸的控制杆叶片,布置在每个由多个燃料组件形成的方形束区域的对角线上的通道箱和纬向短叶片控制棒之间,每个具有控制杆叶片 每个方形束区域的中心处的通道箱之间布置有横截面在四个方向上的横截面,每个控制杆叶片具有约一个平方束区域的宽度的大约一半的纬度长度。 长叶片控制杆具有纬度叶片长度,其长度为短叶片控制棒的纬向叶片长度的两倍。

    Process for producing acetic anhydride
    7.
    发明授权
    Process for producing acetic anhydride 失效
    生产乙酸酐的方法

    公开(公告)号:US4556519A

    公开(公告)日:1985-12-03

    申请号:US568526

    申请日:1984-01-06

    IPC分类号: C07C51/54 C07C51/56

    CPC分类号: C07C51/54 C07C51/56

    摘要: A process for producing acetic anhydride which comprises reacting methyl acetate or dimethyl ether with carbon monoxide in the presence of a catalyst comprising (a) nickel or a nickel compound and (b) at least one halide selected from the group consisting of bromides, iodides and mixtures thereof, and together with a specific co-catalyst which is disclosed. According to this invention acetic anhydride is produced by using highly active non-expensive catalyst and co-catalyst.

    摘要翻译: 一种生产乙酸酐的方法,其包括使乙酸甲酯或二甲醚与一氧化碳在催化剂存在下反应,所述催化剂包含(a)镍或镍化合物和(b)至少一种选自溴化物,碘化物和 并且与所公开的特定助催化剂一起。 根据本发明,通过使用高活性非昂贵的催化剂和助催化剂制备乙酸酐。

    Microcomputer
    8.
    发明授权
    Microcomputer 有权
    微电脑

    公开(公告)号:US08516288B2

    公开(公告)日:2013-08-20

    申请号:US12941969

    申请日:2010-11-08

    申请人: Takao Kondo

    发明人: Takao Kondo

    IPC分类号: G06F1/00 G05F1/10

    摘要: IO buffers that operate with an IO power supply system and cut cells that isolate the IO buffers from each other are disposed on the periphery of an always-on power supply area and a power supply cut-off available area. A signal indicating the holding of an IO output(s) output from the always-on power supply area is wired so as to go round the IO buffers and the cut cells. The cut cell includes a level shifter that operates with an IO power supply system. The cut cell shifts the level of signal indicating the holding of IO output so that the signal level conforms to the power supply system of IO buffers, and outputs the resultant signal to the IO buffers.

    摘要翻译: 使用IO电源系统操作的IO缓冲器和将IO缓冲器彼此隔离的切断单元被布置在始终接通的电源区域和电源切断可用区域的外围。 指示保持从永远在线电源区域输出的IO输出的信号被布线,以便绕过IO缓冲器和切割单元。 切割单元包括用IO电源系统操作的电平移位器。 切割单元移动指示保持IO输出的信号电平,使得信号电平符合IO缓冲器的电源系统,并将结果信号输出到IO缓冲器。

    Semiconductor integrated circuit device having fail-safe mode and memory control method
    9.
    发明授权
    Semiconductor integrated circuit device having fail-safe mode and memory control method 有权
    具有故障安全模式和存储器控制方法的半导体集成电路器件

    公开(公告)号:US08055957B2

    公开(公告)日:2011-11-08

    申请号:US12149915

    申请日:2008-05-09

    申请人: Takao Kondo

    发明人: Takao Kondo

    IPC分类号: G11C29/00 G11C11/34 H03M13/00

    摘要: An integrated circuit device contains a flash memory, a flash control unit for controlling the rewriting and reading on the flash memory, and a processor unit. The processor unit includes a normal mode and a fail-safe mode as the operating states. In normal mode, when a defect is detected during the verify operation after writing data onto the flash memory then any further use of the flash memory is stopped. In fail-safe-mode, when a defect is detected during the verify operation after writing data onto the flash memory, the error is corrected and flash memory usage continues. The operating state is normal mode, and when the verify operation detects a defect after normal mode erase operation, the operation shifts to fail-safe mode.

    摘要翻译: 集成电路装置包括闪速存储器,用于控制闪存上的重写和读取的闪存控制单元以及处理器单元。 处理器单元包括正常模式和作为操作状态的故障安全模式。 在正常模式下,当在闪速存储器中写入数据之后在验证操作期间检测到缺陷时,停止对闪存的进一步使用。 在故障安全模式下,当在闪速存储器中写入数据之后,在验证操作期间检测到缺陷时,纠正错误并继续使用闪存使用。 操作状态为正常模式,当正常模式擦除操作后验证操作检测到故障时,操作切换到故障安全模式。