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公开(公告)号:US11182233B2
公开(公告)日:2021-11-23
申请号:US16850899
申请日:2020-04-16
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Rui-Guang Chen , Chuan-Chieh Wang
Abstract: A method for recording memory errors includes the following steps: upon detecting a current correctable error that occurred in a volatile memory device, determining whether a count value corresponding to the current correctable error exceeds a predetermined value; and when it is determined that the count value corresponding to the current correctable error thus detected does not exceed the predetermined value, sending update event information corresponding to the current correctable error to a BMC, in order for the BMC to record information of the current correctable error.
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公开(公告)号:US20210334086A1
公开(公告)日:2021-10-28
申请号:US17239283
申请日:2021-04-23
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Hsin-Hao CHU
Abstract: A method is provided for adding a sensor monitoring feature of a newly-added sensor to a system monitoring feature provided by a baseboard management controller (BMC). The BMC stores a BMC firmware that contains a main program, a sensor library and a sensor data record. The BMC updates the sensor library to a target sensor library that includes identification information of the additional sensor, and functions used to execute the sensor monitoring feature of the additional sensor. By executing the main program, the BMC loads the target sensor library, and adds the identification information of the additional sensor to the sensor data record.
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公开(公告)号:US10908661B2
公开(公告)日:2021-02-02
申请号:US16414596
申请日:2019-05-16
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Ko-Yi Yao
Abstract: A method is provided for optimizing fan speed control of a computer system that includes a fan unit, a temperature sensor, a control unit to control operation of the fan unit, and a disk storage unit. A forbidden range corresponding to a range for a fan speed is determined based on a relationship between fan speed and vibration of the disk storage unit. An optimized fan control table is generated based on a reference table relating to a relationship between ambient temperature and fan speed. The optimized fan control table is generated by making a part of the ambient temperature values in the reference table change to corresponding to a predetermined fan speed not smaller than a fan speed value corresponding to an upper limit of the forbidden range.
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公开(公告)号:US10725790B2
公开(公告)日:2020-07-28
申请号:US16588174
申请日:2019-09-30
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Jyun-Hong Li , Chi-Hao Kuan
IPC: G06F9/4401 , G06K9/62 , G06N20/00 , G06K9/46
Abstract: A method for identifying a boot stage of a BIOS of a computer device is provided. A control terminal receives screen information data indicative of a current BIOS screen image of the computer device, acquires current screen information based on the screen information data, acquires feature vector based on the current screen information, uses an image classification model to classify the current information into a screen category, and generates boot stage information indicative of a boot stage corresponding to the screen category.
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公开(公告)号:US20200097063A1
公开(公告)日:2020-03-26
申请号:US16573236
申请日:2019-09-17
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Cheng-Chun CHEN , Jing-Cin HUANG , Chih-Peng CHANG
IPC: G06F1/3287 , H04W52/02
Abstract: A server system and a power-saving method thereof are provided. The power-saving method includes: enabling, by a programmable logic unit in a working mode, a power-on control unit to operate according to a working power; determining, by the power-on control unit in the working mode, whether a power-saving power-off signal is received, and when the power-saving power-off signal is received, controlling, by the power-on control unit, the server system to be powered off and switched from the working mode to a soft-off mode; operating, by the programmable logic unit, according to standby power to enable, in the soft-off mode, the power-on control unit to operate according to the standby power; and turning off, by a baseboard management control unit, the programmable logic unit according to the power-saving power-off signal when the power-on control unit operates according to the standby power, to turn off the power-on control unit.
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公开(公告)号:US20190305844A1
公开(公告)日:2019-10-03
申请号:US16358238
申请日:2019-03-19
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Wei-Ti WENG
IPC: H04B10/079 , H04B10/40
Abstract: A network switch device and an operating method therefor are provided. The method includes: receiving, by a logic unit, a plurality of interrupt control signals from a plurality of optical fiber data transceivers, where each of the interrupt control signals reflects whether an operating state of each of the optical fiber data transceivers becomes anomalous or changes; combining, by the logic unit, the interrupt control signals from the optical fiber data transceivers into an interrupt combined signal; receiving, by an interrupt control pin of a processing unit, the interrupt combined signal; determining, by the processing unit, whether a logic level of the interrupt combined signal changes; and if the processing unit determines that the logic level of the interrupt combined signal changes, executing, by the processing unit, an interrupt handler, and determining which one of the optical fiber data transceivers becomes anomalous or changes.
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公开(公告)号:US10387164B2
公开(公告)日:2019-08-20
申请号:US15869902
申请日:2018-01-12
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Yan-Ting Jiang
IPC: G06F9/4401 , G06F13/40 , G06F13/42
Abstract: A method for initializing a peripheral component interconnect express (PCI-E) interface card is provided. The method includes: initializing, by a processing unit in a boot procedure according to a preset first value of a flag, a PCI-E interface card inserted in a PCI-E interface slot by using a first initialization parameter included in a basic input/output system (BIOS) code; setting, by the processing unit in the boot procedure according to the initialized PCI-E interface card, the flag to have the first value or a second value; determining, by the processing unit in the boot procedure, whether the initialized PCI-E interface card needs to be reinitialized; and reinitializing, by the processing unit according to the second value of the set flag when the PCI-E interface card needs to be reinitialized, the PCI-E interface card by using a second initialization parameter included in the BIOS code.
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公开(公告)号:US10341137B2
公开(公告)日:2019-07-02
申请号:US15671265
申请日:2017-08-08
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Ke-Chun Chuang
IPC: H04L12/42 , G06F12/0813 , G06F13/42 , G06F12/0888 , H04L12/715
Abstract: A computer cluster system includes a plurality of computer groups each having a plurality of computer nodes. For each of the computer groups, the computer nodes cooperatively form a first ring topology, and one of the computer nodes serves as a first-ring master node of the first ring topology. The first-ring master nodes of the first ring topologies cooperatively form a second ring topology, and one of the first-ring master nodes serves as a second-ring master node of the second ring topology.
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公开(公告)号:US10162646B2
公开(公告)日:2018-12-25
申请号:US15624956
申请日:2017-06-16
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Po-Wen Huang , Kei-Way Chang , Shih-Ta Chu , Jun-Jie Wu , Chen-Nan Hsiao
IPC: G06F15/177 , G06F9/44 , G06F9/445 , G06F9/4401 , G06F8/65 , G06F1/24 , G06F8/654
Abstract: A system includes a programmable non-volatile memory, a switch, a control chipset, and a basic input/output (BIOS) module. The switch has a first terminal coupled to the programmable non-volatile memory, and a second terminal coupled to the control chipset. The control chipset is configured to store a SKU parameter set in the programmable non-volatile memory according to a predetermined memory allocation. The BIOS module is coupled to the control chipset, and is configured to load and update the SKU parameter set according to the predetermined memory configuration during a booting operation of the motherboard.
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公开(公告)号:US10120761B2
公开(公告)日:2018-11-06
申请号:US15293402
申请日:2016-10-14
Applicant: MITAC COMPUTING TECHNOLOGY CORPORATION
Inventor: Jen-Chih Lee , Kwang-Chao Chen
Abstract: A method for data communication within an I2C system is provided. The method includes the steps of: a) generating a communication error code indicative of error status when data transmission from a master module to a slave module via an I2C bus fails; b) determining whether to retransmit the data to the slave module according to the communication error code; c) when the determination made in step c) is affirmative, determining whether a number of times of data retransmission(s) associated with the data reaches a predetermined number; d) when the determination made in step c) is affirmative, resetting the master module; and e) recording a communication error event according to the communication error code after step a).
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