公开(公告)号：US20120256276A1

公开(公告)日：2012-10-11

申请号：US13082387

申请日：2011-04-07

申请人： Guang-Yaw Hwang ,  Chun-Hsien Lin ,  Hung-Ling Shih ,  Jiunn-Hsiung Liao ,  Zhi-Cheng Lee ,  Shao-Hua Hsu ,  Yi-Wen Chen ,  Cheng-Guo Chen ,  Jung-Tsung Tseng ,  Chien-Ting Lin ,  Tong-Jyun Huang ,  Jie-Ning Yang ,  Tsung-Lung Tsai ,  Po-Jui Liao ,  Chien-Ming Lai ,  Ying-Tsung Chen ,  Cheng-Yu Ma ,  Wen-Han Hung ,  Che-Hua Hsu

发明人： Guang-Yaw Hwang ,  Chun-Hsien Lin ,  Hung-Ling Shih ,  Jiunn-Hsiung Liao ,  Zhi-Cheng Lee ,  Shao-Hua Hsu ,  Yi-Wen Chen ,  Cheng-Guo Chen ,  Jung-Tsung Tseng ,  Chien-Ting Lin ,  Tong-Jyun Huang ,  Jie-Ning Yang ,  Tsung-Lung Tsai ,  Po-Jui Liao ,  Chien-Ming Lai ,  Ying-Tsung Chen ,  Cheng-Yu Ma ,  Wen-Han Hung ,  Che-Hua Hsu

IPC分类号： H01L29/78 ,  H01L21/3205

CPC分类号： H01L29/517 ,  H01L21/28088 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843 ,  H01L29/7845 ,  H01L29/7846

摘要： A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O2 ambience treatment is performed on at least one layer of the multi-layered stack structure. A conductive layer is formed on the multi-layered stack structure.

摘要翻译： 提供一种制造金属栅极的方法。 该方法包括提供基板。 然后，在基板上形成栅极电介质层。 在栅极电介质层上形成具有功函数金属层的多层堆叠结构。 在多层堆叠结构的至少一层上进行O2气氛处理。 在多层堆叠结构上形成导电层。

公开(公告)号：US20120244669A1

公开(公告)日：2012-09-27

申请号：US13053223

申请日：2011-03-22

申请人： Po-Jui Liao ,  Tsung-Lung Tsai ,  Chien-Ting Lin ,  Shao-Hua Hsu ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Chan-Lon Yang ,  Chun-Yuan Wu ,  Teng-Chun Tsai ,  Guang-Yaw Hwang ,  Chia-Lin Hsu ,  Jie-Ning Yang ,  Cheng-Guo Chen ,  Jung-Tsung Tseng ,  Zhi-Cheng Lee ,  Hung-Ling Shih ,  Po-Cheng Huang ,  Yi-Wen Chen ,  Che-Hua Hsu

发明人： Po-Jui Liao ,  Tsung-Lung Tsai ,  Chien-Ting Lin ,  Shao-Hua Hsu ,  Yi-Wei Chen ,  Hsin-Fu Huang ,  Tzung-Ying Lee ,  Min-Chuan Tsai ,  Chan-Lon Yang ,  Chun-Yuan Wu ,  Teng-Chun Tsai ,  Guang-Yaw Hwang ,  Chia-Lin Hsu ,  Jie-Ning Yang ,  Cheng-Guo Chen ,  Jung-Tsung Tseng ,  Zhi-Cheng Lee ,  Hung-Ling Shih ,  Po-Cheng Huang ,  Yi-Wen Chen ,  Che-Hua Hsu

IPC分类号： H01L21/8238

CPC分类号： H01L21/823842 ,  H01L21/823807 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/7833

摘要： The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench.

摘要翻译： 本发明提供一种制造具有金属栅极的半导体器件的方法。 首先，提供基板。 具有第一牺牲栅极的第一导电型晶体管和具有第二牺牲栅极的第二导电型晶体管设置在衬底上。 去除第一牺牲栅极以形成第一沟槽。 然后，在第一沟槽中形成第一金属层。 去除第二牺牲栅极以形成第二沟槽。 接下来，在第一沟槽和第二沟槽中形成第二金属层。 最后，在第二金属层上形成第三金属层，其中第三金属层被填充到第一沟槽和第二沟槽中。

公开(公告)号：US08268712B2

公开(公告)日：2012-09-18

申请号：US12788408

申请日：2010-05-27

申请人： Che-Hua Hsu ,  Shao-Hua Hsu ,  Zhi-Cheng Lee ,  Cheng-Guo Chen

发明人： Che-Hua Hsu ,  Shao-Hua Hsu ,  Zhi-Cheng Lee ,  Cheng-Guo Chen

IPC分类号： H01L21/336 ,  H01L21/467 ,  H01L21/8238

CPC分类号： H01L21/823807 ,  H01L21/31138 ,  H01L21/32139 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7834

摘要： A method of forming metal gate transistor includes providing a substrate; forming a gate dielectric layer, a work function metal layer and a polysilicon layer stacked on the substrate; forming a hard mask and a patterned photoresist on the polysilicon layer; removing the patterned photoresist, and next utilizing the hard mask as an etching mask to remove parts of the polysilicon layer and parts of the work function metal layer. Thus, a gate stack is formed. Since the patterned photoresist is removed before forming the gate stack, the gate stack is protected from damages of the photoresist-removing process. The photoresist-removing process does not attack the sidewalls of the gate stack, so a bird's beak effect of the gate dielectric layer is prevent.

摘要翻译： 一种形成金属栅极晶体管的方法，包括：提供衬底; 形成层叠在基板上的栅介质层，功函数金属层和多晶硅层; 在所述多晶硅层上形成硬掩模和图案化光致抗蚀剂; 去除图案化的光致抗蚀剂，接着利用硬掩模作为蚀刻掩模去除部分多晶硅层和功函数金属层的一部分。 因此，形成栅堆叠。 由于在形成栅极叠层之前去除图案化的光致抗蚀剂，所以保护栅极堆叠免受光致抗蚀剂去除工艺的损害。 光致抗蚀剂去除工艺不会侵蚀栅极堆叠的侧壁，因此防止栅极电介质层的鸟喙效应。

公开(公告)号：US08138582B2

公开(公告)日：2012-03-20

申请号：US12710482

申请日：2010-02-23

申请人： Cheng-Guo Jin ,  Yuichiro Sasaki ,  Bunji Mizuno

发明人： Cheng-Guo Jin ,  Yuichiro Sasaki ,  Bunji Mizuno

IPC分类号： H01L29/06 ,  H01L21/38

CPC分类号： H01L21/2236 ,  H01L21/26513 ,  H01L21/268 ,  H01L22/12 ,  H01L22/20 ,  H01L22/26

摘要： An impurity doping system is disclosed, which includes an impurity doping device for doping an impurity into a surface of a solid state base body, a measuring device for measuring an optical characteristic of an area into which the impurity is doped, and an annealing device for annealing the area into which the impurity is doped. The impurity doping system realizes an impurity doping not to bring about a rise of a substrate temperature, and measures optically physical properties of a lattice defect generated by the impurity doping step to control such that subsequent steps are optimized.

摘要翻译： 公开了一种杂质掺杂系统，其包括用于将杂质掺杂到固态基体的表面中的杂质掺杂装置，用于测量掺杂杂质的区域的光学特性的测量装置，以及用于 退火掺杂杂质的区域。 杂质掺杂系统实现杂质掺杂不会引起衬底温度的升高，并且测量由杂质掺杂步骤产生的晶格缺陷的光学物理性质以进行控制，使得后续步骤被优化。

公开(公告)号：US08129202B2

公开(公告)日：2012-03-06

申请号：US12648142

申请日：2009-12-28

申请人： Tomohiro Okumura ,  Yuichiro Sasaki ,  Katsumi Okashita ,  Hiroyuki Ito ,  Bunji Mizuno ,  Cheng-Guo Jin ,  Ichiro Nakayama

发明人： Tomohiro Okumura ,  Yuichiro Sasaki ,  Katsumi Okashita ,  Hiroyuki Ito ,  Bunji Mizuno ,  Cheng-Guo Jin ,  Ichiro Nakayama

IPC分类号： H01L21/00

CPC分类号： H01L21/2236 ,  H01J37/321 ,  H01J37/32412 ,  H01J2237/2001

摘要： It is intended to provide a plasma doping method and apparatus which are superior in the controllability of the concentration of an impurity that is introduced into a surface layer of a sample.A prescribed gas is introduced into a vacuum container 1 from a gas supply apparatus 2 while being exhausted by a turbomolecular pump 3 as an exhaust apparatus. The pressure in the vacuum container 1 is kept at a prescribed value by a pressure regulating valve 4. High-frequency electric power of 13.56 MHz is supplied from a high-frequency power source 5 to a coil 8 disposed close to a dielectric window 7 which is opposed to a sample electrode 6, whereby induction-coupled plasma is generated in the vacuum container 1. A high-frequency power source 10 for supplying high-frequency electric power to the sample electrode 6 is provided. Every time a prescribed number of samples have been processed, a dummy sample is subjected to plasma doping and then to heating. The conditions for processing of a sample are controlled so that the measurement value of the surface sheet resistance becomes equal to a prescribed value, whereby the controllability of the impurity concentration can be increased.

摘要翻译： 旨在提供一种等离子体掺杂方法和装置，该等离子体掺杂方法和装置在引入样品的表面层中的杂质的浓度的可控性方面是优异的。 将规定的气体从作为排气装置的涡轮分子泵3排出而从气体供给装置2引入真空容器1。 真空容器1中的压力通过压力调节阀4保持在规定值。13.56MHz的高频电力从高频电源5供给到靠近电介质窗7设置的线圈8， 与样品电极6相对，从而在真空容器1中产生感应耦合等离子体。提供了用于向样品电极6提供高频电力的高频电源10。 每当处理规定数量的样品时，将虚拟样品进行等离子体掺杂，然后进行加热。 控制处理样品的条件使得表面薄层电阻的测量值等于规定值，从而可以提高杂质浓度的可控性。

公开(公告)号：US20110294274A1

公开(公告)日：2011-12-01

申请号：US12788408

申请日：2010-05-27

申请人： Che-Hua Hsu ,  Shao-Hua Hsu ,  Zhi-Cheng Lee ,  Cheng-Guo Chen

发明人： Che-Hua Hsu ,  Shao-Hua Hsu ,  Zhi-Cheng Lee ,  Cheng-Guo Chen

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L21/823807 ,  H01L21/31138 ,  H01L21/32139 ,  H01L21/823814 ,  H01L21/823835 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7833 ,  H01L29/7834

摘要： A method of forming metal gate transistor includes providing a substrate; forming a gate dielectric layer, a work function metal layer and a polysilicon layer stacked on the substrate; forming a hard mask and a patterned photoresist on the polysilicon layer; removing the patterned photoresist, and next utilizing the hard mask as an etching mask to remove parts of the polysilicon layer and parts of the work function metal layer. Thus, a gate stack is formed. Since the patterned photoresist is removed before forming the gate stack, the gate stack is protected from damages of the photoresist-removing process. The photoresist-removing process does not attack the sidewalls of the gate stack, so a bird's beak effect of the gate dielectric layer is prevent.

摘要翻译： 一种形成金属栅极晶体管的方法，包括：提供衬底; 形成层叠在基板上的栅介质层，功函数金属层和多晶硅层; 在所述多晶硅层上形成硬掩模和图案化光致抗蚀剂; 去除图案化的光致抗蚀剂，接着利用硬掩模作为蚀刻掩模去除部分多晶硅层和功函数金属层的一部分。 因此，形成栅堆叠。 由于在形成栅极叠层之前去除图案化的光致抗蚀剂，所以保护栅极堆叠免受光致抗蚀剂去除工艺的损害。 光致抗蚀剂去除工艺不会侵蚀栅极堆叠的侧壁，因此防止栅极电介质层的鸟喙效应。

公开(公告)号：US07981779B2

公开(公告)日：2011-07-19

申请号：US10574863

申请日：2004-10-08

申请人： Yuichiro Sasaki ,  Cheng-Guo Jin ,  Bunji Mizuno

发明人： Yuichiro Sasaki ,  Cheng-Guo Jin ,  Bunji Mizuno

IPC分类号： H01L21/223

CPC分类号： H01L21/268

摘要： An object of this invention is to provide a method for making a junction which is simple in the process, high in the throughput, and can make a shallow junction with high accuracy. After the suitable state of a substrate surface adapted to the wavelength of an electromagnetic wave to be applied has been formed, the electromagnetic wave is applied to electrically activate impurities so that the excited energy is effectively absorbed within the impurity thin film, thereby effectively making a shallow junction.

摘要翻译： 本发明的目的是提供一种制造接头的方法，其工艺简单，生产能力高，并且可以以高精度形成浅结。 在形成适合于要施加的电磁波的波长的基板表面的合适状态之后，施加电磁波以电激活杂质，使得激发能量被有效地吸收在杂质薄膜内，从而有效地使 浅交界处

公开(公告)号：US07932185B2

公开(公告)日：2011-04-26

申请号：US11292072

申请日：2005-12-02

申请人： Toshio Kudo ,  Bunji Mizuno ,  Yuichiro Sasaki ,  Cheng-Guo Jin

发明人： Toshio Kudo ,  Bunji Mizuno ,  Yuichiro Sasaki ,  Cheng-Guo Jin

IPC分类号： H01L21/31 ,  H01L21/00

CPC分类号： H01L21/26506 ,  H01L21/2236 ,  H01L21/26513 ,  H01L21/268 ,  H01L29/6659

摘要： A laser annealing process capable of suppressing a variation in sheet resistance. A surface layer formed shallower than 100 nm in a substrate of semiconductor material is added with impurities. The substrate is irradiated with a laser beam or its harmonic beam emitted from a laser diode pumped to solid-state laser to activate the impurities.

摘要翻译： 能够抑制薄层电阻变化的激光退火工艺。 在半导体材料的衬底中形成的比100nm浅的表面层添加有杂质。 用从激光二极管发射到激光二极管的激光束或其谐波束照射衬底以激活杂质。

公开(公告)号：US20100167508A1

公开(公告)日：2010-07-01

申请号：US12718549

申请日：2010-03-05

申请人： Yuichiro Sasaki ,  Bunji Mizuno ,  Cheng-Guo Jin

发明人： Yuichiro Sasaki ,  Bunji Mizuno ,  Cheng-Guo Jin

IPC分类号： H01L21/225 ,  H01L21/263 ,  H01L21/265

CPC分类号： H01L21/26506 ,  H01L21/223 ,  H01L21/2236 ,  H01L21/2254 ,  Y10T117/10

摘要： A method for introducing impurities includes a step for forming an amorphous layer at a surface of a semiconductor substrate, and a step for forming a shallow impurity-introducing layer at the semiconductor substrate which has been made amorphous, and an apparatus used therefore. Particularly, the step for forming the amorphous layer is a step for irradiating plasma to the surface of the semiconductor substrate, and the step for forming the shallow impurity-introducing layer is a step for introducing impurities into the surface which has been made amorphous.

摘要翻译： 用于引入杂质的方法包括在半导体衬底的表面形成非晶层的步骤，以及在半导体衬底上形成非晶化的浅杂质引入层的步骤以及因此使用的装置。 特别地，用于形成非晶层的步骤是用于将等离子体照射到半导体衬底的表面的步骤，并且用于形成浅掺杂杂质的层的步骤是将杂质引入已经被制成无定形的表面的步骤。

公开(公告)号：US20100009469A1

公开(公告)日：2010-01-14

申请号：US12398669

申请日：2009-03-05

申请人： Takayuki Kai ,  Tomohiro Okumura ,  Hisao Nagai ,  Cheng-Guo Jin ,  Bunji Mizuno

发明人： Takayuki Kai ,  Tomohiro Okumura ,  Hisao Nagai ,  Cheng-Guo Jin ,  Bunji Mizuno

IPC分类号： H01L21/02

CPC分类号： H05H1/0043 ,  H01J37/32412 ,  H01J37/32972 ,  H01L21/2236 ,  H01L22/12 ,  H01L22/26

摘要： During a plasma discharging process, a laser beam having a certain exciting wavelength is applied to a surface of a process substrate, so as to measure, using scattered light, an impurity density and a crystal state on the surface of the process substrate.

摘要翻译： 在等离子体放电过程中，将具有一定激发波长的激光束施加到处理衬底的表面，以便使用散射光在处理衬底的表面上测量杂质浓度和晶体状态。