公开(公告)号：US20120155168A1

公开(公告)日：2012-06-21

申请号：US13323868

申请日：2011-12-13

申请人： Moosung Kim ,  Jaewoo Im ,  Jae-Duk Yu ,  Kitae Park ,  Ohsuk Kwon

发明人： Moosung Kim ,  Jaewoo Im ,  Jae-Duk Yu ,  Kitae Park ,  Ohsuk Kwon

IPC分类号： G11C16/08 ,  G11C8/10 ,  G11C16/34 ,  G11C16/04 ,  G05F3/08 ,  G11C16/26

CPC分类号： G11C11/5628 ,  G11C5/14 ,  G11C5/143 ,  G11C5/145 ,  G11C5/147 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/30 ,  G11C16/3459 ,  G11C2211/5641

摘要： A negative voltage generator includes a direct current voltage generator configured to generate a direct current voltage, a reference voltage generator configured to generate a reference voltage, an oscillator configured to generate an oscillation clock, a charge pump configured to generate a negative voltage in response to a pump clock, and a voltage detector. The voltage detector is configured to detect the negative voltage by comparing a division voltage, obtained by voltage dividing the direct current voltage, with the reference voltage, and to generate the pump clock corresponding to the detected negative voltage based on the oscillation clock.

摘要翻译： 负电压发生器包括被配置为产生直流电压的直流电压发生器，被配置为产生参考电压的参考电压发生器，被配置为产生振荡时钟的振荡器，配置成响应于 泵时钟和电压检测器。 电压检测器被配置为通过将通过分压直流电压获得的分压与参考电压进行比较来检测负电压，并且基于振荡时钟产生对应于检测到的负电压的泵时钟。

公开(公告)号：US08194455B2

公开(公告)日：2012-06-05

申请号：US12701037

申请日：2010-02-05

申请人： Hyun-Sil Oh ,  Kitae Park ,  Soonwook Hwang

发明人： Hyun-Sil Oh ,  Kitae Park ,  Soonwook Hwang

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C16/0483

摘要： Provided is a method for programming a nonvolatile memory device. The nonvolatile memory device includes a local word line to divide a memory cell string into a first area including a selected word line and a second area not including the selected word line. In the method, word lines of the first area are driven by a first pass voltage and word lines of the second area driven by a second pass voltage higher than the first pass voltage. A cell transistor corresponding to the local word line is turned off after the first pass voltage and the second pass voltage are applied. The selected word line is driven by a program voltage after the cell transistor is turned off.

摘要翻译： 提供了一种用于对非易失性存储器件进行编程的方法。 非易失性存储器件包括用于将存储单元串划分成包括所选字线的第一区域和不包括所选字线的第二区域的本地字线。 在该方法中，第一区域的字线由第一通过电压和由比第一通过电压高的第二通过电压驱动的第二区域的字线驱动。 在施加第一通过电压和第二通过电压之后，对应于本地字线的单元晶体管截止。 在单元晶体管截止之后，所选字线由编程电压驱动。

公开(公告)号：US20100293393A1

公开(公告)日：2010-11-18

申请号：US12777676

申请日：2010-05-11

申请人： Kitae Park

发明人： Kitae Park

IPC分类号： G06F12/14

CPC分类号： G06F12/0246 ,  G06F2212/1032

摘要： A memory controller includes a first interface unit, a processor, a randomization unit, a state conversion unit, and a second interface unit. The first interface unit exchanges data with an external device, and the processor determines whether to randomize or state-convert the received data. The randomization unit randomizes data received through the first interface unit in response to the processor and generates randomization information in response to the randomization operation. The state conversion unit state-converts data received through the first interface unit in response to the processor and generates conversion information in response to the state conversion operation. The second interface unit receives the randomized data and the randomization information from the randomization unit, receives the state-converted data and the conversion information from the state conversion unit, and exchanges at least one of the randomized data, the randomization information, the state-converted data and the conversion information with a memory.

摘要翻译： 存储器控制器包括第一接口单元，处理器，随机化单元，状态转换单元和第二接口单元。 第一接口单元与外部设备交换数据，并且处理器确定是否对所接收的数据进行随机化或状态转换。 随机化单元响应于处理器随机化通过第一接口单元接收的数据，并且响应于随机化操作生成随机化信息。 状态转换单元响应于处理器对通过第一接口单元接收的数据进行状态转换，并响应于状态转换操作产生转换信息。 第二接口单元从随机化单元接收随机数据和随机化信息，从状态转换单元接收状态转换数据和转换信息，并且交换随机数据，随机化信息，状态转换信息中的至少一个， 转换数据和转换信息。

公开(公告)号：US20100124120A1

公开(公告)日：2010-05-20

申请号：US12608384

申请日：2009-10-29

申请人： Kitae PARK ,  Hyun-Sil OH

发明人： Kitae PARK ,  Hyun-Sil OH

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C16/10

摘要： A nonvolatile memory device includes; a memory cell array including a plurality of memory cells arranged in word lines and bit lines, a high-voltage generator generating a program voltage pulse applied to a selected word line among the word lines, and a pass voltage applied to a non-selected word line, and control logic iteratively increasing the program voltage pulse and adjusting the pass voltage according to a defined increment during a program operation.

摘要翻译： 非易失性存储装置包括： 包括以字线和位线布置的多个存储单元的存储单元阵列，产生施加到字线中的所选字线的编程电压脉冲的高压发生器，以及施加到未选择字的通过电压 线路和控制逻辑迭代地增加编程电压脉冲，并且在程序操作期间根据定义的增量来调整通过电压。