Abstract:
A method is provided to cause deformation of a substrate during processing of the substrate. The method comprises supporting a substrate on a substrate support in a vacuum chamber for processing; providing backside gas through inlet ports of each of a plurality of groups of ports lying in a respective plurality of areas across the substrate support to a space between the substrate support and the substrate, each of said areas of the substrate support having at least one backside gas inlet port connected to a supply of backside gas and at least one outlet port connected to a vacuum exhaust system; and separately controlling the pressure of the backside gas at different ones of the ports of the plurality to control separately, in areas around the respective ones of said ports, the local pressure force exerted on the backside of the substrate, by separately dynamically controlling at least one valve affecting gas flow to a port of each of said areas while separately dynamically controlling at least one other valve affecting gas flow from the remaining plurality of ports of each of said areas surrounding said port to which gas is introduced.
Abstract:
A method of processing a wafer is presented that includes creating a pre-processing measurement map using measured metrology data for the wafer including metrology data for at least one isolated structure on the wafer, metrology data for at least one nested structure on the wafer, or mask data. At least one pre-processing prediction map is calculated for the wafer. A pre-processing confidence map is calculated for the wafer. The pre-processing confidence map includes a set of confidence data for the plurality of dies on the wafer. A prioritized measurement site is determined when the confidence data for one or more dies is not within the confidence limits. A new measurement recipe that includes the prioritized measurement site is then created.
Abstract:
The invention can provide a method of processing a substrate using S-O processing sequences and evaluation libraries that can include one or more optimized spacer creation and evaluation procedures.
Abstract:
A method and apparatus are provided to control the radial or non-radial temperature distribution across a substrate during processing to compensate for non-uniform effects, including radial and angular non-uniformities arising from system variations, or process variations, or both. The temperature is controlled, preferably dynamically, by flowing backside gas differently across different areas on a wafer supporting chuck to vary heat conduction across the wafer. Backside gas flow, of helium, for example, is dynamically varied across the chuck to control the uniformity of processing of the wafer. Ports in the support are grouped, and gas to or from the groups is separately controlled by different valves responsive to a controller that controls gas pressure in each of the areas to spatially and preferably dynamically control wafer temperature to compensate for system and process non-uniformities.
Abstract:
A method for facilitating an ODP measurement of a semiconductor wafer. The method includes obtaining real time wafer characteristic data for a measurement site on said wafer and detecting a measured diffraction signal from a structure within the measurement site of the wafer. The measured diffraction signal is matched with a simulated diffraction signal stored in a wafer characteristic dependent profile library. A hypothetical profile structure associated with the simulated diffraction signal in the wafer characteristic dependent profile library is then identified. The real time wafer characteristic data is used to facilitate at least one of the matching and identifying.
Abstract:
The invention can provide a method of processing a wafer using a Real-Time Parameter Tuning (RTPT) procedure to receive an input message that can include a pass-through message, a real-time feedforward message, or a real-time optimization message, or any combination thereof. The RTPT procedures can use real-time wafer temperature data to create, modify, and/or use measurement recipe data, measurement profile data, and/or measurement model data. In addition, RTPT procedures can use real-time wafer temperature data to create, modify, and/or use process recipe data, process profile data, and/or process model data.
Abstract:
A method of measuring a damaged structure formed on a semiconductor wafer using optical metrology, the method includes obtaining a measured diffraction signal from a damaged periodic structure. A hypothetical profile of the damaged periodic structure is defined. The hypothetical profile having an undamaged portion, which corresponds to an undamaged area of a first material in the damaged periodic structure, and a damaged portion, which corresponds to a damaged area of the first material in the damaged periodic structure. The undamaged portion and the damaged portion have different properties associated with them. A simulated diffraction signal is calculated for the hypothetical damaged periodic structure using the hypothetical profile. The measured diffraction signal is compared to the simulated diffraction signal. If the measured diffraction signal and the simulated diffraction signal match within a matching criterion, then a damage amount for the damaged periodic structure is established based on the damaged portion of the hypothetical profile used to calculate the simulated diffraction signal.
Abstract:
This method includes a method for etch processing that allows the bias between isolated and nested structures/features to be adjusted, correcting for a process wherein the isolated structures/features need to be smaller than the nested structures/features and wherein the nested structures/features need to be reduced relative to the isolated structures/features, while allowing for the critical control of trimming.
Abstract:
A system, method and program product for correcting a deviation of a dimension of a feature from a target in a semiconductor process, are disclosed. The invention determines an origin of a deviation in a feature dimension from a target dimension regardless of whether it is based on processing or metrology. Adjustments for wafer processing variation of previous process tools can be fed forward, and adjustments for the process and/or integrated metrology tools may be fed back automatically during the processing of semiconductor wafers. The invention implements process reference wafers to determine the origin in one mode, and measurement reference wafers to determine the origin of deviations in another mode.
Abstract:
To determine the profile of an integrated circuit structure, a signal is measured off the structure with a metrology device. The measured signal is compared to signals in a virtual profile library. The comparison is stopped if matching criteria are met. A subset of a virtual profile data space is determined when the matching criteria are not met. The subset is determined using profile data space associated with the library. A virtual profile signal of the subset is selected. Virtual profile shape/parameters are determined based on the virtual profile signal. A difference is calculated between the measured and virtual profile signals. The difference is compared to virtual profile library creation criteria. If the criteria are met, then the structure is identified using virtual profile data, which includes the virtual profile shape/parameters, associated with the virtual profile signal. Or, if the criteria are not met, then a corrective action is applied.