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101 条记录 (耗时 0.021 秒)

    Method for providing low-level hardware access to in-band and out-of-band firmware
    91.
    发明授权
    Method for providing low-level hardware access to in-band and out-of-band firmware 失效
    用于提供对带内和带外固件的低级硬件访问的方法

    公开(公告)号：US07467204B2

    公开(公告)日：2008-12-16

    申请号：US11055675

    申请日：2005-02-10

    申请人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    发明人： James Stephen Fields, Jr. ,  Paul Frank Lecocq ,  Brian Chan Monwai ,  Thomas Pflueger ,  Kevin Franklin Reick ,  Timothy M. Skergan ,  Scott Barnett Swaney

    IPC分类号： G06F15/173 ,  G06F15/167

    CPC分类号： G06F15/161

    摘要： In-band firmware executes instructions which cause commands to be sent on a coherency fabric. Fabric snoop logic monitors the coherency fabric for command packets that target a resource in one of the support chips attached via an FSI link. Conversion logic converts the information from the fabric packet into an FSI protocol. An FSI command is transmitted via the FSI transmit link to an FSI slave of the intended support chip. An FSI receive link receives response data from the FSI slave of the intended support chip. Conversion logic converts the information from the support chip received via the FSI receive link into the fabric protocol. Response packet generation logic generates the fabric response packet and returns it on the coherency fabric. An identical FSI link between a support processor and support chips allows direct access to the same resources on the support chips by out-of-band firmware.

    摘要翻译： 带内固件执行指令，使指令在一致性结构上发送。 Fabric Snoop逻辑监视针对通过FSI链接附加的支持芯片之一的资源的命令包的一致性结构。 转换逻辑将信息从Fabric数据包转换为FSI协议。 FSI命令通过FSI传输链路发送到预期支持芯片的FSI从站。 FSI接收链路从预期的支持芯片的FSI从站接收响应数据。 转换逻辑将从通过FSI接收链路接收的支持芯片的信息转换为结构协议。 响应分组生成逻辑生成结构响应分组并将其返回到一致性结构上。 支持处理器和支持芯片之间的相同FSI链路允许通过带外固件直接访问支持芯片上的相同资源。

    Method to use fabric initialization to test functionality of all inter-chip paths between processors in system
    92.
    发明授权
    Method to use fabric initialization to test functionality of all inter-chip paths between processors in system 失效
    使用结构初始化测试系统中处理器之间所有芯片间路径功能的方法

    公开(公告)号：US07430684B2

    公开(公告)日：2008-09-30

    申请号：US11054275

    申请日：2005-02-09

    申请人： Benjiman Lee Goodman ,  Paul Frank Lecocq ,  Praveen S. Reddy

    发明人： Benjiman Lee Goodman ,  Paul Frank Lecocq ,  Praveen S. Reddy

    IPC分类号： G06F11/00

    CPC分类号： G06F11/2242

    摘要： A method, apparatus, and program for systematically testing the functionality of all connections in a multi-tiered bus system that connects a large number of processors. Each bus controller is instructed to send a test version of a snoop request to all of the other processors and to wait for the replies. If a connection is bad, the port associated with that connection will time out. Detection of a time-out will cause the initialization process to be halted until the problem can be isolated and resolved.

    摘要翻译： 一种用于系统地测试连接大量处理器的多层总线系统中所有连接的功能的方法，装置和程序。 指示每个总线控制器向所有其他处理器发送窥探请求的测试版本，并等待回复。 如果连接不良，与该连接关联的端口将超时。 检测超时将导致初始化过程停止，直到问题被隔离和解决为止。

    Synchronizing triggering of multiple hardware trace facilities using an existing system bus
    94.
    发明授权
    Synchronizing triggering of multiple hardware trace facilities using an existing system bus 失效
    使用现有系统总线同步触发多个硬件跟踪工具

    公开(公告)号：US07418629B2

    公开(公告)日：2008-08-26

    申请号：US11055870

    申请日：2005-02-11

    申请人： Ra'ed Mohammad Al-Omari ,  Michael Stephen Floyd ,  Paul Frank Lecocq

    发明人： Ra'ed Mohammad Al-Omari ,  Michael Stephen Floyd ,  Paul Frank Lecocq

    IPC分类号： G06F11/00

    CPC分类号： G06F11/2268 ,  G06F11/348

    摘要： A method, apparatus, and computer program product are disclosed in a data processing system for synchronizing the triggering of multiple hardware trace facilities using an existing bus. The multiple hardware trace facilities include a first hardware trace facility and a second hardware trace facility. The data processing system includes a first processor that includes the first hardware trace facility and first processing units that are coupled together utilizing the system bus, and a second processor that includes the second hardware trace facility and second processing units that are coupled together utilizing the system bus. Information is transmitted among the first and second processing units utilizing the system bus when the processors are in a normal, non-tracing mode, where the information is formatted according to a standard system bus protocol. Trigger events are transmitted to the hardware trace facilities utilizing the same standard system bus, where the trigger events are also formatted according to the standard system bus protocol.

    摘要翻译： 在用于使用现有总线触发多个硬件跟踪设备的数据处理系统中公开了一种方法，装置和计算机程序产品。 多个硬件跟踪设备包括第一个硬件跟踪设备和第二个硬件跟踪设备。 数据处理系统包括第一处理器，其包括第一硬件跟踪设备和利用系统总线耦合在一起的第一处理单元，以及包括第二硬件跟踪设备的第二处理器和利用系统耦合在一起的第二处理单元 总线。 当处理器处于正常的非跟踪模式时，利用系统总线在第一和第二处理单元之间传送信息，其中信息根据标准系统总线协议被格式化。 触发事件使用相同的标准系统总线传输到硬件跟踪设备，触发事件也根据标准系统总线协议进行格式化。