公开(公告)号：US07944240B2

公开(公告)日：2011-05-17

申请号：US12494808

申请日：2009-06-30

Applicant: Sang-Jin Byeon

Inventor： Sang-Jin Byeon

IPC: H03K19/094 ,  H03K19/0175

CPC classification number: H03K19/018528

Abstract: A buffer of a semiconductor memory apparatus includes a buffering section configured to generate an output signal by buffering an input signal. A mismatch compensation section generates a control voltage in correspondence with sizes of a second transistor of the same type as a first transistor constituting the buffering section, wherein the buffering section controls a transition time of the output signal in response to a level of the control voltage.

Abstract translation: 半导体存储装置的缓冲器包括：缓冲部，被配置为通过缓冲输入信号来产生输出信号。 不匹配补偿部分根据与构成缓冲部分的第一晶体管相同类型的第二晶体管的尺寸产生控制电压，其中缓冲部分响应于控制电压的电平控制输出信号的转变时间 。

公开(公告)号：US07800424B2

公开(公告)日：2010-09-21

申请号：US11958277

申请日：2007-12-17

Applicant: Sang Jin Byeon

Inventor： Sang Jin Byeon

IPC: G06F1/04

CPC classification number: G11C7/08 ,  G11C5/143 ,  G11C5/145 ,  G11C11/4091

Abstract: An apparatus for supplying an overdriving signal in a memory apparatus. The apparatus includes: a voltage detecting block that outputs a plurality of detection signals according to the level of an external voltage, and a pulse generator that outputs the overdriving signals having different pulse widths according to the plurality of detection signals.

Abstract translation: 一种用于在存储装置中提供过驱动信号的装置。 该装置包括：电压检测块，其根据外部电压的电平输出多个检测信号;以及脉冲发生器，其根据多个检测信号输出具有不同脉冲宽度的过驱动信号。

公开(公告)号：US07773432B2

公开(公告)日：2010-08-10

申请号：US12118810

申请日：2008-05-12

Applicant: Sang Jin Byeon

Inventor： Sang Jin Byeon

IPC: G11C7/00 ,  G11C5/14

CPC classification number: G11C7/06 ,  G11C7/08 ,  G11C2207/065

Abstract: A semiconductor memory device having a driver configured to sequentially perform over-driving and normal driving operations is presented. The semiconductor memory device includes a driver that outputs a drive signal, that over-drives the drive signal with an over-drive voltage having a voltage level higher than a normal drive voltage, and then subsequently normally drives the drive signal with the normal drive voltage. The semiconductor memory device also includes a drive voltage adjuster that detects a level of the over-drive voltage and compensates for a change in the voltage level of the normal drive voltage in response to the detected level of the over-drive voltage.

Abstract translation: 本发明提供一种具有驱动器的半导体存储器件，该驱动器被配置为顺序执行过驱动和正常驱动操作。 该半导体存储器件包括：驱动器，其输出驱动信号，该驱动信号用具有高于正常驱动电压的电压电平的过驱动电压驱动驱动信号，然后随后以正常驱动电压驱动驱动信号 。 半导体存储器件还包括驱动电压调节器，其检测过驱动电压的电平并且响应于检测到的过驱动电压的水平来补偿正常驱动电压的电压电平的变化。

公开(公告)号：US20100097877A1

公开(公告)日：2010-04-22

申请号：US12431981

申请日：2009-04-29

Applicant: Sang Jin BYEON

Inventor： Sang Jin BYEON

IPC: G11C5/14

CPC classification number: G11C5/147 ,  G11C7/1045

Abstract: A semiconductor memory apparatus includes an internal circuit configured to be driven by current flowing between first and second voltage nodes, and a current control unit configured to control an amount of the current in response to an operational-speed information signal.

Abstract translation: 一种半导体存储装置，包括被配置为由在第一和第二电压节点之间流动的电流驱动的内部电路，以及被配置为响应于操作速度信息信号来控制电流量的电流控制单元。

公开(公告)号：US20100091583A1

公开(公告)日：2010-04-15

申请号：US12640883

申请日：2009-12-17

Applicant: Sang-Jin BYEON ,  Beom-Ju Shin

Inventor： Sang-Jin BYEON ,  Beom-Ju Shin

IPC: G11C7/10

CPC classification number: G11C7/1048

Abstract: A semiconductor memory device of the claimed invention, having an active state for performing a read or write operation and an inactive state except for the active state includes a data input/output (I/O) line; a pull-up latch unit for pulling-up the data I/O line when the semiconductor memory device is in the inactive state; a pull-down latch unit for pulling-down the data I/O line when the semiconductor memory device is in the inactive state; and a selection unit for selectively driving one of the pull-up latch unit and the pull-down latch unit.

Abstract translation: 具有用于执行读或写操作的活动状态和除活动状态之外的非活动状态的所要求保护的发明的半导体存储器件包括数据输入/输出（I / O）线; 上拉锁存单元，用于在半导体存储器件处于非活动状态时拉起数据I / O线; 一个下拉锁存单元，用于在半导体存储器件处于非活动状态时下拉数据I / O线; 以及选择单元，用于选择性地驱动上拉锁存单元和下拉锁存单元中的一个。

公开(公告)号：US07646652B2

公开(公告)日：2010-01-12

申请号：US11647401

申请日：2006-12-29

Applicant: Sang-Jin Byeon

Inventor： Sang-Jin Byeon

IPC: G11C5/14

CPC classification number: G11C5/14

Abstract: An internal voltage generator stably supplies an internal voltage in a semiconductor device. The internal voltage generator includes: a first internal voltage generating means for supplying a first internal voltage which has a level corresponding to a first reference voltage using an external voltage; a second internal voltage generating means for supplying a second internal voltage which has a level corresponding to a second reference voltage using the external voltage; and a third internal voltage generating means for supplying a third internal voltage which has a level corresponding to a third reference voltage generated based on the first internal voltage, using the second internal voltage as a power source.

Abstract translation: 内部电压发生器稳定地提供半导体器件中的内部电压。 内部电压发生器包括：第一内部电压产生装置，用于使用外部电压提供具有对应于第一参考电压的电平的第一内部电压; 第二内部电压产生装置，用于使用外部电压提供具有对应于第二参考电压的电平的第二内部电压; 以及第三内部电压产生装置，用于使用第二内部电压作为电源来提供具有与基于第一内部电压产生的第三参考电压相对应的电平的第三内部电压。

公开(公告)号：US07619946B2

公开(公告)日：2009-11-17

申请号：US11823695

申请日：2007-06-28

Applicant: Sang-Jin Byeon ,  Seok-Cheol Yoon

Inventor： Sang-Jin Byeon ,  Seok-Cheol Yoon

IPC: G11C7/00

CPC classification number: G05F1/46

Abstract: An active driver includes an internal voltage supply node, an internal voltage generator, and a test internal voltage driving circuit. The internal voltage generator generates an internal voltage having a first potential level in a normal operation to provide the internal voltage to the internal voltage supply node. The test internal voltage driving circuit drives an external voltage having a second potential level higher than the first potential level to the internal voltage supply node in a test operation.

Abstract translation: 有源驱动器包括内部电压供应节点，内部电压发生器和测试内部电压驱动电路。 内部电压发生器在正常操作中产生具有第一电位电平的内部电压，以向内部电压供应节点提供内部电压。 测试内部电压驱动电路在测试操作中将具有高于第一电位电平的第二电位电平的外部电压驱动到内部电压供应节点。

公开(公告)号：US20090067264A1

公开(公告)日：2009-03-12

申请号：US12118810

申请日：2008-05-12

Applicant: Sang Jin BYEON

Inventor： Sang Jin BYEON

IPC: G11C7/12

CPC classification number: G11C7/06 ,  G11C7/08 ,  G11C2207/065

Abstract: A semiconductor memory device having a driver configured to sequentially perform over-driving and normal driving operations is presented. The semiconductor memory device includes a driver that outputs a drive signal, that over-drives the drive signal with an over-drive voltage having a voltage level higher than a normal drive voltage, and then subsequently normally drives the drive signal with the normal drive voltage. The semiconductor memory device also includes a drive voltage adjuster that detects a level of the over-drive voltage and compensates for a change in the voltage level of the normal drive voltage in response to the detected level of the over-drive voltage.

Abstract translation: 本发明提供一种具有驱动器的半导体存储器件，该驱动器被配置为顺序执行过驱动和正常驱动操作。 该半导体存储器件包括：驱动器，其输出驱动信号，该驱动信号用具有高于正常驱动电压的电压电平的过驱动电压驱动驱动信号，然后随后以正常驱动电压驱动驱动信号 。 半导体存储器件还包括驱动电压调节器，其检测过驱动电压的电平并且响应于检测到的过驱动电压的水平来补偿正常驱动电压的电压电平的变化。

公开(公告)号：US20090059701A1

公开(公告)日：2009-03-05

申请号：US12005506

申请日：2007-12-26

Applicant: Sang-Jin Byeon

Inventor： Sang-Jin Byeon

IPC: G11C7/00 ,  G11C8/00 ,  H03K3/42

CPC classification number: G11C7/04 ,  G11C5/147 ,  G11C7/08 ,  G11C11/4074 ,  G11C11/4091

Abstract: A core voltage discharger is capable of adjusting an amount of a current discharged according to temperature. The discharger for decreasing a level of a predetermined voltage receives temperature information from an on die thermal sensor and discharges a different amount of current in response to the temperature information.

Abstract translation: 核心电压放电器能够根据温度调节放电的电流量。 用于降低预定电压的电平的放电器接收来自管芯热传感器的温度信息，并且响应于温度信息而放电不同量的电流。

公开(公告)号：US20080303504A1

公开(公告)日：2008-12-11

申请号：US11987936

申请日：2007-12-06

Applicant: Khil-Ohk Kang ,  Sang-Jin Byeon

Inventor： Khil-Ohk Kang ,  Sang-Jin Byeon

IPC: G05F3/16

CPC classification number: G05F3/30 ,  G11C5/143 ,  G11C5/147 ,  G11C7/04

Abstract: A semiconductor device includes: a first reference voltage generator for generating a first reference voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce a first and a second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage as a bias input and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator.

Abstract translation: 半导体器件包括：用于产生第一参考电压的第一参考电压发生器; 第一带隙电路，用于分割第二参考电压输出节点处的电压，以产生具有相对于温度变化的性质的第一和第二带隙电压; 第一比较器，用于接收第一参考电压作为偏置输入，并将第一带隙电压与第二带隙电压进行比较; 以及用于响应于第一比较器的输出信号上拉驱动第二参考电压输出节点的第一驱动器。