WRITE METHOD WITH VOLTAGE LINE TUNING
    91.
    发明申请
    WRITE METHOD WITH VOLTAGE LINE TUNING 有权
    具有电压线调谐的写入方法

    公开(公告)号:US20100110762A1

    公开(公告)日:2010-05-06

    申请号:US12412546

    申请日:2009-03-27

    IPC分类号: G11C11/00 G11C7/00

    摘要: A method of writing to a resistive sense memory unit includes applying a first voltage across a resistive sense memory cell and a semiconductor transistor to write a first data state to the resistive sense memory cell. The first voltage forms a first write current for a first time duration through the resistive sense memory cell in a first direction. Then the method includes applying a second voltage across the resistive sense memory cell and the transistor to write a second data state to the resistive sense memory cell. The second voltage forms a second write current for a second duration through the resistive sense memory cell in a second direction. The second direction opposes the first direction, the first voltage has a different value than the second voltage, and the first duration is substantially the same as the second duration.

    摘要翻译: 写入电阻式读出存储器单元的方法包括在电阻读出存储单元和半导体晶体管两端施加第一电压以将第一数据状态写入电阻读出存储单元。 第一电压在第一方向通过电阻读出存储单元形成第一持续时间的第一写入电流。 然后,该方法包括在电阻读出存储单元和晶体管两端施加第二电压以将第二数据状态写入电阻读出存储单元。 第二电压在第二方向通过电阻读出存储器单元形成第二持续时间的第二写入电流。 第二方向与第一方向相反,第一电压具有与第二电压不同的值,并且第一持续时间基本上与第二持续时间相同。

    Spatial Correlation of Reference Cells in Resistive Memory Array
    92.
    发明申请
    Spatial Correlation of Reference Cells in Resistive Memory Array 有权
    参考细胞在电阻记忆阵列中的空间相关性

    公开(公告)号:US20100110761A1

    公开(公告)日:2010-05-06

    申请号:US12398256

    申请日:2009-03-05

    IPC分类号: G11C11/00

    摘要: The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

    摘要翻译: 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值,并映射每个测量的可变电阻存储单元的位置,以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后,基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行,以最小化读取操作错误,以及形成可变电阻存储器 单元存储器阵列。

    Integrated Circuit Active Power Supply Regulation
    93.
    发明申请
    Integrated Circuit Active Power Supply Regulation 审中-公开
    集成电路有源电源调节

    公开(公告)号:US20100085110A1

    公开(公告)日:2010-04-08

    申请号:US12501375

    申请日:2009-07-10

    IPC分类号: G05F1/10

    CPC分类号: G05F1/46

    摘要: Method and apparatus for compensating for voltage fluctuations on a voltage supply line in an integrated circuit device. In accordance with some embodiments, the apparatus includes a voltage fluctuation sensor which senses a voltage on the supply line, and a compensation circuit comprising a switch and a charge storage device (CSD). The switch actively connects the CSD to the supply line when the voltage sensed by the voltage fluctuation sensor passes outside a predetermined voltage range.

    摘要翻译: 用于补偿集成电路装置中的电压供应线上的电压波动的方法和装置。 根据一些实施例,该装置包括感测电源线上的电压的电压波动传感器和包括开关和电荷存储装置(CSD)的补偿电路。 当电压波动传感器感测到的电压超过预定电压范围时,开关主动将CSD连接到电源线。

    Spatial correlation of reference cells in resistive memory array
    94.
    发明授权
    Spatial correlation of reference cells in resistive memory array 有权
    参考电池在电阻式存储器阵列中的空间相关性

    公开(公告)号:US08526215B2

    公开(公告)日:2013-09-03

    申请号:US13410783

    申请日:2012-03-02

    IPC分类号: G11C11/00

    摘要: The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

    摘要翻译: 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值,并映射每个测量的可变电阻存储单元的位置,以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后,基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行,以最小化读取操作错误,以及形成可变电阻存储器 单元存储器阵列。

    Spin-transfer torque memory self-reference read method
    95.
    发明授权
    Spin-transfer torque memory self-reference read method 有权
    自旋转矩存储器自参考读取方式

    公开(公告)号:US08411495B2

    公开(公告)日:2013-04-02

    申请号:US13349052

    申请日:2012-01-12

    IPC分类号: G11C11/00

    摘要: A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

    摘要翻译: 描述了自旋转移力矩存储装置和自参考读取方案。 读取自旋传递转矩存储单元的一种自参考方法包括:通过磁性隧道结数据单元施加第一读取电流并形成第一位线读取电压,所述磁性隧道结数据单元具有第一电阻状态并存储 第一电压存储装置中的第一位线读取电压。 然后通过磁性隧道结数据单元施加低电阻状态的极化写入电流,形成低的第二电阻状态磁隧道结数据单元。 第二读取电流通过低的第二电阻状态磁隧道结数据单元施加以形成第二位线读取电压。 第二位线读取电压被存储在第二电压存储装置中。 该方法还包括将第一位线读取电压与第二位线读取电压进行比较,以确定磁性隧道结数据单元的第一电阻状态是高电阻状态还是低电阻状态。

    TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT
    96.
    发明申请
    TRANSMISSION GATE-BASED SPIN-TRANSFER TORQUE MEMORY UNIT 有权
    基于传输门控的转子转矩记忆单元

    公开(公告)号:US20120230093A1

    公开(公告)日:2012-09-13

    申请号:US13474839

    申请日:2012-05-18

    IPC分类号: G11C11/16

    摘要: A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.

    摘要翻译: 描述基于传输门的自旋转移转矩存储单元。 存储单元包括电耦合到位线和源极线的磁性隧道结数据单元。 NMOS晶体管与PMOS晶体管并联电连接,并且它们与源极线和磁性隧道结数据单元电连接。 磁隧道结数据单元被配置为通过使极化写入电流通过磁性隧道结数据单元在高电阻状态和低电阻状态之间切换。 PMOS晶体管和NMOS晶体管可单独寻址,使得第一方向上的第一写入电流流过PMOS晶体管,并且第二方向的第二写入电流流过NMOS晶体管。

    Spin-transfer torque memory non-destructive self-reference read method
    97.
    发明授权
    Spin-transfer torque memory non-destructive self-reference read method 有权
    旋转转矩记忆无损自参考读取方法

    公开(公告)号:US08116123B2

    公开(公告)日:2012-02-14

    申请号:US12147727

    申请日:2008-06-27

    IPC分类号: G11C11/00

    CPC分类号: G11C11/1673 G11C11/1693

    摘要: A spin-transfer torque memory apparatus and non-destructive self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage and storing the first bit line read voltage in a first voltage storage device. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state and forming a second bit line read voltage and storing the second bit line read voltage in a second voltage storage device. The first read current is less than the second read current. Then the stored first bit line read voltage is compared with the stored second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

    摘要翻译: 描述了自旋转移力矩存储装置和非破坏性自参考读取方案。 读取自旋转移力矩存储单元的一种自参考方法包括:通过磁性隧道结数据单元施加第一读取电流并形成第一位线读取电压,并将第一位线读取电压存储在第一电压存储装置中。 磁性隧道结数据单元具有第一电阻状态。 然后,该方法包括通过具有第一电阻状态的磁性隧道结数据单元施加第二读取电流并形成第二位线读取电压,并将第二位线读取电压存储在第二电压存储器件中。 第一个读取电流小于第二个读取电流。 然后将存储的第一位线读取电压与存储的第二位线读取电压进行比较,以确定磁性隧道结数据单元的第一电阻状态是高电阻状态还是低电阻状态。

    MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS
    98.
    发明申请
    MEMORY ARRAY WITH READ REFERENCE VOLTAGE CELLS 有权
    存储器阵列,带有读参考电压电池

    公开(公告)号:US20110194330A1

    公开(公告)日:2011-08-11

    申请号:US13088610

    申请日:2011-04-18

    IPC分类号: G11C11/00

    CPC分类号: G11C7/14 G11C11/1673

    摘要: The present disclosure relates to memory arrays with read reference voltage cells. In particular the present disclosure relates to variable resistive memory cell apparatus and arrays that include a high resistance state reference memory cell and a low resistance state reference memory cell that provides a reliable average reference voltage on chip to compare to a read voltage of a selected memory cell and determine if the selected memory cell is in the high resistance state or low resistance state. These memory arrays are particularly suitable for use with spin-transfer torque memory cells and resolves many systematic issues related to generation of a reliable reference voltage.

    摘要翻译: 本公开涉及具有读取参考电压单元的存储器阵列。 特别地,本公开涉及包括高电阻状态参考存储单元和低电阻状态参考存储单元的可变电阻存储单元设备和阵列,其提供片上可靠的平均参考电压以与所选择的存储器的读取电压进行比较 并确定所选存储单元是处于高电阻状态还是低电阻状态。 这些存储器阵列特别适用于自旋转移转矩存储单元,并且解决了与生成可靠参考电压有关的许多系统问题。

    Spatial Correlation of Reference Cells in Resistive Memory Array
    100.
    发明申请
    Spatial Correlation of Reference Cells in Resistive Memory Array 有权
    参考细胞在电阻记忆阵列中的空间相关性

    公开(公告)号:US20110080769A1

    公开(公告)日:2011-04-07

    申请号:US12968438

    申请日:2010-12-15

    IPC分类号: G11C11/00

    摘要: The present disclosure relates to methods of selectively placing a reference column or reference row in a memory array. The method includes measuring a resistance state resistance value for a plurality of variable resistive memory cells within a memory array and mapping a location of each measured variable resistive memory cell to form a map of the resistance state resistance values for a plurality of variable resistive memory cells within a memory array. Then a column or row is selected to be a reference column or reference row based on the map of the resistance state resistance value for a plurality of variable resistive memory cells within a memory array, to minimize read operation errors, and forming a variable resistive memory cell memory array.

    摘要翻译: 本公开涉及将参考列或参考行选择性地放置在存储器阵列中的方法。 该方法包括测量存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值,并映射每个测量的可变电阻存储单元的位置,以形成多个可变电阻存储单元的电阻状态电阻值的映射 在内存阵列内。 然后,基于存储器阵列内的多个可变电阻存储器单元的电阻状态电阻值的映射来选择列或行作为参考列或参考行,以最小化读取操作错误,以及形成可变电阻存储器 单元存储器阵列。