Translation and filtering techniques for wireless receivers
    91.
    发明授权
    Translation and filtering techniques for wireless receivers 有权
    无线接收机的翻译和过滤技术

    公开(公告)号:US07551910B2

    公开(公告)日:2009-06-23

    申请号:US11434038

    申请日:2006-05-15

    Applicant: Hooman Darabi

    Inventor: Hooman Darabi

    CPC classification number: H04B1/123

    Abstract: Various embodiments are disclosed relating to wireless receivers. According to an example embodiment, a method and apparatus are provided. The method may include receiving an input signal within a first frequency range (e.g., RF). The input signal may include a desired signal and a blocker signal. The method may also include down-converting the input signal to a second frequency range (e.g., IF) that is lower than the first frequency range, separating the blocker signal from desired signal (e.g., at the second frequency range), up-converting the separated blocker signal to the first frequency range (e.g., RF), and subtracting the up-converted blocker signal from the input signal.

    Abstract translation: 公开了与无线接收器有关的各种实施例。 根据示例性实施例,提供了一种方法和装置。 该方法可以包括在第一频率范围(例如,RF)内接收输入信号。 输入信号可以包括期望的信号和阻塞信号。 该方法还可以包括将输入信号下变频到低于第一频率范围的第二频率范围(例如,IF),将阻塞信号与期望信号(例如,在第二频率范围)分离,上转换 分离的阻塞信号到第一频率范围(例如,RF),并从输入信号中减去上变频的阻塞信号。

    LOW FLICKER NOISE MIXER AND BUFFER
    92.
    发明申请
    LOW FLICKER NOISE MIXER AND BUFFER 有权
    低闪烁噪音混合器和缓冲器

    公开(公告)号:US20090134932A1

    公开(公告)日:2009-05-28

    申请号:US11944715

    申请日:2007-11-26

    Abstract: Low flicker noise mixer and buffer. This design employs some native metal oxide semiconductor field-effect transistors (MOSFETs) (e.g., having no threshold voltage) within a passive mixer whose gates are driven using clock signals. These native MOSFETs maybe biased at one half of the power supply voltage to provide a lower noise figure. A cooperatively operating buffer employs appropriately places MOSFETs and resistors to ensure the desired gain. Relatively larger valued resistors can be employed to provide for higher voltage gain, and this can sometimes be accompanied with using a higher than typical power supply voltage. Source followers serve as output buffers and also ensure the required output DC voltage level as well. It is also noted that this design can be implemented using n-channel metal oxide semiconductor field-effect transistors (N-MOSFETs) of p-channel metal oxide semiconductor field-effect transistors (P-MOSFETs).

    Abstract translation: 低闪烁噪声混频器和缓冲器。 该设计在无源混频器内采用一些本征金属氧化物半导体场效应晶体管(MOSFET)(例如,不具有阈值电压),其门的栅极使用时钟信号驱动。 这些原生MOSFET可能偏置在电源电压的一半处,以提供较低的噪声系数。 合作运行的缓冲器适当地放置MOSFET和电阻器以确保期望的增益。 可以采用相对较大值的电阻器来提供更高的电压增益,并且有时可以伴随使用高于典型的电源电压。 源跟随器用作输出缓冲器,并且还确保所需的输出直流电压电平。 还应注意,该设计可以使用p沟道金属氧化物半导体场效应晶体管(P-MOSFET)的n沟道金属氧化物半导体场效应晶体管(N-MOSFET)来实现。

    RF FRONT-END AND APPLICATIONS THEREOF
    93.
    发明申请
    RF FRONT-END AND APPLICATIONS THEREOF 有权
    RF前端及其应用

    公开(公告)号:US20090130993A1

    公开(公告)日:2009-05-21

    申请号:US11942263

    申请日:2007-11-19

    CPC classification number: H04B1/48 H04B1/006

    Abstract: An RF front-end includes a receiver frequency band filter module, a low noise amplifier, a first power amplifier module, a second power amplifier module, and a transmit frequency band filter module. The receiver frequency band filter module filters a received RF signal and the low noise amplifier amplifies the signal in accordance with the first or the second RF front-end configuration signal. The first power amplifier module is enabled in accordance with the first RF front-end configuration signal to amplify the first outbound RF signal and the second power amplifier module is enabled in accordance with the second RF front-end configuration signal to amplify the second outbound RF signal. The transmitter frequency band filter module is enabled in accordance with the second RF front-end configuration signal to filter the second transmit RF signal.

    Abstract translation: RF前端包括接收机频带滤波器模块,低噪声放大器,第一功率放大器模块,第二功率放大器模块和发射频带滤波器模块。 接收机频带滤波器模块对接收的RF信号进行滤波,低噪声放大器根据第一或第二RF前端配置信号来放大信号。 第一功率放大器模块根据第一RF前端配置信号被使能以放大第一出站RF信号,并且第二功率放大器模块根据第二RF前端配置信号被使能以放大第二出站RF 信号。 发射机频带滤波器模块根据第二RF前端配置信号被使能以对第二发射RF信号进行滤波。

    Programmable gain amplifier (PGA) with AGC in receiver section
    94.
    发明授权
    Programmable gain amplifier (PGA) with AGC in receiver section 失效
    接收器部分具有AGC的可编程增益放大器(PGA)

    公开(公告)号:US07515891B2

    公开(公告)日:2009-04-07

    申请号:US11043326

    申请日:2005-01-26

    Applicant: Hooman Darabi

    Inventor: Hooman Darabi

    CPC classification number: H03G3/3052 H04B1/406

    Abstract: A method and apparatus for dynamically controlling a programmable gain amplifier (PGA) to provide a plurality of gain steps thereby providing automatic gain control (AGC) in a receiver intermediate frequency (IF) stage comprising a succession of operational amplifiers wherein at least one is for providing fine gain control and wherein the gain of each fine gain amplifier is controlled by the resistance ratios of a plurality of selectively biased MOSFETs. In one embodiment of the invention, three coarse amplifiers are provided, each having a gain of either 0 dB or 12 dB based on the value of a two-state signal provided to each amplifier gain control input. A single fine gain amplifier has a gain of 0 dB, 3 dB, 6 dB or 9 dB based on the binary value of the two-bit signal provided to the amplifier.

    Abstract translation: 一种用于动态地控制可编程增益放大器(PGA)以提供多个增益步骤的方法和装置,从而在包括一系列运算放大器的接收器中频(IF)级中提供自动增益控制(AGC),其中至少一个用于 提供精细增益控制,并且其中每个细增益放大器的增益由多个选择性偏置的MOSFET的电阻比来控制。 在本发明的一个实施例中,提供了三个粗放大器,每个粗放大器基于提供给每个放大器增益控制输入的两状态信号的值,分别具有0dB或12dB的增益。 基于提供给放大器的2位信号的二进制值,单个细增益放大器的增益为0dB,3dB,6dB或9dB。

    MULTI-MODE CELLULAR IC MEMORY MANAGEMENT
    95.
    发明申请
    MULTI-MODE CELLULAR IC MEMORY MANAGEMENT 有权
    多模式集成电路内存管理

    公开(公告)号:US20090036088A1

    公开(公告)日:2009-02-05

    申请号:US12056493

    申请日:2008-03-27

    CPC classification number: H04B1/406

    Abstract: An RFIC includes first and second RF sections, first and second PHY processing modules, first and second upper layer processing modules, and memory. When the RFIC is in a first receive mode, the first RF section, the first PHY processing module, and the first upper layers processing module convert a first inbound RF signal into a first inbound audio signal in accordance with a first wireless communication protocol. When the RFIC is in a second receive mode, the second RF section, the second PHY processing module, and the second upper layers processing module convert a second inbound RF signal into a second inbound audio signal in accordance with a second wireless communication protocol. The memory stores the first and second inbound audio signals. The first PHY processing module retrieves, based on the receive mode, the first or second inbound audio signal from the memory and converts the first or second inbound audio signal into a first or second inbound analog audio signal.

    Abstract translation: RFIC包括第一和第二RF部分,第一和第二PHY处理模块,第一和第二上层处理模块以及存储器。 当RFIC处于第一接收模式时,第一RF部分,第一PHY处理模块和第一上层处理模块根据第一无线通信协议将第一入站RF信号转换成第一入站音频信号。 当RFIC处于第二接收模式时,第二RF部分,第二PHY处理模块和第二上层处理模块根据第二无线通信协议将第二入站RF信号转换成第二入站音频信号。 存储器存储第一和第二入站音频信号。 第一PHY处理模块基于接收模式检索来自存储器的第一或第二入站音频信号,并将第一或第二入站音频信号转换为第一或第二入站模拟音频信号。

    Highly Linear and Very Low-Noise Down-Conversion Mixer for Extracting Weak Signals in the Presence of Very Strong Unwanted Signals
    96.
    发明申请
    Highly Linear and Very Low-Noise Down-Conversion Mixer for Extracting Weak Signals in the Presence of Very Strong Unwanted Signals 有权
    高线性和极低噪声下转换混频器,用于在存在非常强的不需要信号的情况下提取弱信号

    公开(公告)号:US20090036087A1

    公开(公告)日:2009-02-05

    申请号:US11833048

    申请日:2007-08-02

    CPC classification number: H03D7/1441 H03D7/1483 H03D7/1491 H03D7/165

    Abstract: A highly linear and very low-noise down-conversion mixer for extracting weak signals in the presence of very strong unwanted signals is disclosed. Aspects of an embodiment may include a source follower circuit in a transmitter front end of a mobile terminal. The source follower circuit may receive RF signals prior to the RF signals being amplified by a power amplifier for transmission. The RF signals may comprise in-phase and quadrature components. The source follower circuit may generate output RF voltage signals, and communicate the output RF voltage signals to a switching circuit via a coupling capacitor. The switching circuit may down-convert the communicated output RF voltage signals to generate differential baseband signals. The capacitance of the coupling capacitor may be changed to change gain and/or linearity of the differential baseband signals. Each of the differential baseband signals may be low-pass filtered to attenuate higher frequencies.

    Abstract translation: 公开了一种用于在存在非常强的有害信号的情况下提取弱信号的高度线性和非常低噪声的下变频混频器。 实施例的方面可以包括移动终端的发射机前端中的源跟随器电路。 源极跟随器电路在RF信号被功率放大器放大以便传输之前可以接收RF信号。 RF信号可以包括同相和正交分量。 源极跟随器电路可以产生输出RF电压信号,并且通过耦合电容器将输出RF电压信号传送到开关电路。 开关电路可以降低所传送的输出RF电压信号的转换,以产生差分基带信号。 可以改变耦合电容器的电容以改变差分基带信号的增益和/或线性度。 每个差分基带信号可以被低通滤波以衰减较高频率。

    Nullification of transmitter noise at receive signal frequency
    97.
    发明申请
    Nullification of transmitter noise at receive signal frequency 有权
    发射机噪声在接收信号频率上的消除

    公开(公告)号:US20090010317A1

    公开(公告)日:2009-01-08

    申请号:US11825415

    申请日:2007-07-06

    CPC classification number: H04B1/1036

    Abstract: According to one exemplary embodiment, a transceiver for nullification of a noise component in a transmitter comprises a noise nullification module loading a selected node in the transmitter. The noise nullification module comprises a mixer that receives inputs from the selected node and a local oscillator, where the mixer is also coupled to a filter such that the noise nullification module presents a low impedance at an approximate frequency of a noise component so as to nullify the noise component. In one embodiment, the noise nullification module results in band-pass filtering of an approximate receive signal frequency so as to nullify a noise component at the receive frequency. In another embodiment, the noise nullification module results in notch filtering of an approximate transmit signal frequency so as to nullify a noise component at a receive signal frequency.

    Abstract translation: 根据一个示例性实施例,用于使发射机中的噪声分量无效的收发器包括加载发射机中的选定节点的噪声无效模块。 噪声无效模块包括接收来自所选节点和本地振荡器的输入的混频器,其中混频器也耦合到滤波器,使得噪声无效模块以噪声分量的近似频率呈现低阻抗,以便无效 噪音成分。 在一个实施例中,噪声无效模块导致近似接收信号频率的带通滤波,以便消除接收频率处的噪声分量。 在另一个实施例中,噪声无效模块导致近似发射信号频率的陷波滤波,以便消除接收信号频率处的噪声分量。

    DAC module and applications thereof

    公开(公告)号:US07463176B2

    公开(公告)日:2008-12-09

    申请号:US11638622

    申请日:2006-12-13

    CPC classification number: H04B1/0483

    Abstract: A digital to analog conversion (DAC) module includes a digital to analog converter, a sample and hold circuit, and a switch module. The digital to analog converter is coupled to convert a digital signal into an analog signal. The sample and hold circuit is coupled to sample the analog signal to produce a sampled analog signal. The switch module is coupled to provide the analog signal as an output of the DAC module when the DAC module in a first mode and to output the analog signal to the sample and hold circuit when the DAC module in a second mode, wherein the sampled analog signal provides the output of the DAC module in the second mode.

    BIAS FILTERING MODULE INCLUDING MOS CAPACITORS
    99.
    发明申请
    BIAS FILTERING MODULE INCLUDING MOS CAPACITORS 有权
    包括MOS电容器的偏置滤波模块

    公开(公告)号:US20080267270A1

    公开(公告)日:2008-10-30

    申请号:US12165332

    申请日:2008-06-30

    Applicant: Hooman Darabi

    Inventor: Hooman Darabi

    Abstract: A bias filtering module with at least two capacitive levels satisfies both a settle time requirement and a filtering requirement using a voltage dependent filter module whose capacitance is a function of a voltage potential on the filtering circuitry output terminal. The final capacitance level is approximately three times larger than the initial capacitance level. MOS capacitors having a voltage dependent charge capacity within the bias filtering module are coupled between a plurality of bias lines and circuit common. In an alternate embodiment, a selectable first group of capacitors are switched into connection within the bias filtering module as a second group of capacitors approximately reach a fully charged state within a specified settle time to provide improved filtering.

    Abstract translation: 具有至少两个电容电平的偏置滤波模块满足稳定时间要求和使用电压依赖滤波器模块的滤波要求,其电容是滤波电路输出端上的电压电位的函数。 最终电容电平大约是初始电容电平的三倍。 偏置滤波模块内具有与电压无关的电荷容量的MOS电容器耦合在多个偏置线和电路之间。 在替代实施例中,随着第二组电容器在指定的结算时间内大致达到完全充电状态,可选择的第一组电容器被切换成偏置滤波模块内的连接,以提供改进的滤波。

    Digital compensation for nonlinearities in a phase-locked loop of a polar transmitter
    100.
    发明申请
    Digital compensation for nonlinearities in a phase-locked loop of a polar transmitter 失效
    极性发射机锁相环非线性的数字补偿

    公开(公告)号:US20080153437A1

    公开(公告)日:2008-06-26

    申请号:US11643166

    申请日:2006-12-21

    CPC classification number: H03C5/00 H03C3/0925 H03C3/0933 H03C3/0991

    Abstract: A polar transmitter includes a digital processor for producing a phase correction signal and a complex modulated digital signal including a digital phase-modulated signal. The phase correction signal is added to the digital phase-modulated signal to produce a corrected digital phase signal. The corrected digital phase signal is input to a phase-locked loop (PLL) to produce an RF phase signal that tracks the phase of the digital phase-modulated signal based on the corrected digital phase signal.

    Abstract translation: 极性发射机包括用于产生相位校正信号的数字处理器和包括数字相位调制信号的复数调制数字信号。 将相位校正信号加到数字相位调制信号上以产生校正的数字相位信号。 校正的数字相位信号被输入到锁相环(PLL)以产生基于经校正的数字相位信号跟踪数字相位调制信号的相位的RF相位信号。

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