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1.发明授权Architectural techniques for envelope and phase signal alignment in RF polar transmitters using power amplifier feedback 有权使用功率放大器反馈的RF极性发射器中的包络和相位信号对准的架构技术公开(公告)号：US08194785B2
公开(公告)日：2012-06-05
申请号：US12356056
申请日：2009-01-19
IPC分类号： H04L25/49
CPC分类号： H04L27/2003 , H03F1/0211
摘要： In an envelope comparison embodiment, a delay calibrator produces a delay signal based on a comparison of a feedback signal and an envelope component of the transmitted signal. A down-converter produces the feedback signal from an outgoing modulated RF signal based on at least one local oscillation. Envelope detectors in the delay calibrator and the envelope signal path are operably coupled to a summing node that produces a delay error signal based on a temporal difference between the two envelopes. One embodiment includes phase detectors to detect and adjust the zero crossings of the feedback signal and the envelope signal path. As the delay mismatch between the envelope signal path and the phase signal path increases, the power spectrum increases in adjacent communication channels. A mask margin measurement technique measures the power level in an adjacent channel and adjusts the envelope path delay accordingly.
摘要翻译： 在包络比较实施例中，延迟校准器基于反馈信号和发射信号的包络分量的比较产生延迟信号。 下变频器基于至少一个本地振荡产生来自输出调制RF信号的反馈信号。 延迟校准器和包络信号路径中的信封检测器可操作地耦合到求和节点，该求和节点基于两个信封之间的时间差产生延迟误差信号。 一个实施例包括用于检测和调整反馈信号和包络信号路径的过零点的相位检测器。 随着包络信号路径和相位信号路径之间的延迟失配增加，相邻通信信道中的功率谱增加。 掩模余量测量技术测量相邻通道中的功率电平，并相应地调整包络路径延迟。
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2.发明授权Two-point modulation polar transmitter architecture and method for performance enhancement 有权两点调制极性发射机架构和方法进行性能提升公开(公告)号：US07940142B2
公开(公告)日：2011-05-10
申请号：US12506997
申请日：2009-07-21
申请人： Henrik T. Jensen , Brima B. Ibrahim
发明人： Henrik T. Jensen , Brima B. Ibrahim
CPC分类号： H03L7/1976 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0991 , H03L7/093
摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.
摘要翻译： 极性发射机包括用于产生宽带宽的RF信号的两点调制锁相环（PLL）。 PLL包括用于接收可变包络调制信号的相位信号并沿着第一信号路径提供相位信号以产生第一频率调制信号的第一输入端和用于接收相位信号并提供相位信号的第二输入端 用于产生第二频率调制信号的第二信号路径。 PLL还包括具有两个调制点的压控振荡器（VCO），一个用于接收第一频率调制信号，另一个用于接收第二频率调制信号。 VCO由第一频率调制信号和第二频率调制信号的集合控制，以将来自IF的相位信号上变频到RF以产生具有宽带宽的RF信号。
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公开(公告)号：US20100290562A1
公开(公告)日：2010-11-18
申请号：US12842963
申请日：2010-07-23
IPC分类号： H04L27/04
CPC分类号： H04B1/0475 , H03C5/00 , H03F1/0222 , H03F1/3241
摘要： A polar transmitter includes a digital processor coupled to receive a complex modulated digital signal and a feedback signal produced from the complex modulated digital signal and that is operable to compare the complex modulated digital signal to the feedback signal to determine an error signal indicative of a difference between the complex modulated digital signal and the feedback signal. The digital processor is further operable to produce a correction signal from the error signal and to add the correction signal to the complex modulated digital signal to produce a corrected complex modulated digital signal.
摘要翻译： 极性发射器包括耦合以接收复调制数字信号的数字处理器和从复调制数字信号产生的反馈信号，其可操作以将复调制数字信号与反馈信号进行比较，以确定指示差分的误差信号 在复调制数字信号与反馈信号之间。 数字处理器还可操作以从误差信号产生校正信号，并将校正信号添加到复调制数字信号以产生经校正的复数调制数字信号。
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公开(公告)号：US07778352B2
公开(公告)日：2010-08-17
申请号：US11643266
申请日：2006-12-21
IPC分类号： H04L25/03
CPC分类号： H04B1/0475 , H03C5/00 , H03F1/0222 , H03F1/3241
摘要： A polar transmitter includes a digital processor coupled to receive a complex modulated digital signal and a feedback signal produced from the complex modulated digital signal and that is operable to compare the complex modulated digital signal to the feedback signal to determine an error signal indicative of a difference between the complex modulated digital signal and the feedback signal. The digital processor is further operable to produce a correction signal from the error signal and to add the correction signal to the complex modulated digital signal to produce a corrected complex modulated digital signal.
摘要翻译： 极性发射器包括耦合以接收复调制数字信号的数字处理器和从复调制数字信号产生的反馈信号，其可操作以将复调制数字信号与反馈信号进行比较，以确定指示差分的误差信号 在复调制数字信号与反馈信号之间。 数字处理器还可操作以从误差信号产生校正信号，并将校正信号添加到复调制数字信号以产生经校正的复数调制数字信号。
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公开(公告)号：US20090311978A1
公开(公告)日：2009-12-17
申请号：US12541765
申请日：2009-08-14
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H04B1/02
CPC分类号： H03L7/18 , H03L7/0891 , H04B1/403
摘要： A frequency synthesizer for use in a transmitter operates to receive outbound transmit data and to modulate the outbound transmit data to produce a modulated RF signal. The modulated RF signal can then be amplified to produce an outbound RF signal.
摘要翻译： 用于发射机的频率合成器用于接收出站发射数据并调制出站发射数据以产生经调制的RF信号。 然后可以对经调制的RF信号进行放大以产生出站RF信号。
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6.发明授权公开(公告)号：US07579922B2
公开(公告)日：2009-08-25
申请号：US11471147
申请日：2006-06-20
申请人： Henrik T. Jensen , Brima B. Ibrahim
发明人： Henrik T. Jensen , Brima B. Ibrahim
IPC分类号： H03C3/09
CPC分类号： H03L7/1976 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03C3/0991 , H03L7/093
摘要： A polar transmitter includes a two-point modulation phase-locked loop (PLL) for producing an RF signal with a wide bandwidth. The PLL includes a first input for receiving a phase signal of a variable-envelope modulated signal and providing the phase signal along a first signal path to produce a first frequency modulation signal and a second input for receiving the phase signal and providing the phase signal along a second signal path to produce a second frequency modulation signal. The PLL further includes a voltage controlled oscillator (VCO) having two modulation points, one for receiving the first frequency modulation signal and the other for receiving the second frequency modulation signal. The VCO is controlled by an aggregate of the first frequency modulation signal and the second frequency modulation signal to up-convert the phase signal from an IF to an RF to produce the RF signal with a wide bandwidth.
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7.发明授权Digital delay element for delay mismatch cancellation in wireless polar transmitters 失效用于无线极性发射机中的延迟失配消除的数字延迟元件公开(公告)号：US07570707B2
公开(公告)日：2009-08-04
申请号：US10925485
申请日：2004-08-25
申请人： Henrik T. Jensen
发明人： Henrik T. Jensen
IPC分类号： H04K1/02
CPC分类号： H03F1/0211 , H03C5/00 , H04L27/361
摘要： A circuit and method therefor provides programmable digital delay that is produced to introduces a delay in either an envelope or a phase signal path of an RF polar transmitter in order to eliminate the delay mismatch between the two paths. For two signal paths, a faster signal may be delayed by a digital processor or a slower signal may be transmitted early so that signals in the two signal paths arrive at a specified circuit node in synchronization. Timing shift may be implemented in either the envelope signal path or the phase signal path and may be used to reduce or increase the timing of a signal path.
摘要翻译： 其电路和方法提供了可编程数字延迟，其产生以在RF极性发射器的包络线或相位信号路径中引入延迟，以消除两个路径之间的延迟失配。 对于两个信号路径，较快的信号可能被数字处理器延迟，或者较慢的信号可以被提前传输，使得两个信号路径中的信号同步到达指定的电路节点。 定时移位可以在包络信号路径或相位信号路径中实现，并且可以用于减少或增加信号路径的定时。
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8.发明申请DIGITAL MODULATOR FOR A GSM/GPRS/EDGE WIRELESS PLAR RF TRANSMITTER 失效用于GSM / GPRS / EDGE无线平板射频发射机的数字调制器公开(公告)号：US20090154598A1
公开(公告)日：2009-06-18
申请号：US12391630
申请日：2009-02-24
申请人： HENRIK T. JENSEN
发明人： HENRIK T. JENSEN
IPC分类号： H04L27/20
CPC分类号： H04L27/2003 , H04L27/2017
摘要： A digital modulator in a radio transmitter includes circuitry for switching between Gaussian Minimum Shift Keying (GMSK) and Phase-Shift Keying (PSK) while maintaining spectral mask requirements. The digital modulator of the present invention includes both GMSK and PSK symbol mappers that produce PSK in-phase and quadrature symbols and GMSK symbols, respectively, to a pulse shaping block. Based on opposite phases of a modulation control signal, the symbol mappers produce either modulated data or a steam of logic zeros to the pulse shaping block. The pulse shaping block filters the received data and multiplexes the data so that each modulated data stream receives non-zero data during a guard time to avoid abrupt changes in the modulated signal that would violate the spectral mask requirements.
摘要翻译： 无线电发射机中的数字调制器包括用于在保持频谱掩模要求的同时在高斯最小移频键控（GMSK）和相移键控（PSK）之间切换的电路。 本发明的数字调制器包括分别产生PSK同相和正交符号和GMSK符号的GMSK和PSK符号映射器到脉冲整形块。 基于调制控制信号的相反相位，符号映射器产生调制数据或逻辑零的蒸汽到脉冲整形块。 脉冲整形块对接收到的数据进行滤波并复用数据，使得每个调制数据流在保护时间期间接收非零数据，以避免将会违反频谱掩模要求的调制信号的突然变化。
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9.发明授权Architectural techniques for envelope and phase signal alignment in RF polar transmitters using power amplifier feedback 失效使用功率放大器反馈的RF极性发射器中的包络和相位信号对准的架构技术公开(公告)号：US07480344B2
公开(公告)日：2009-01-20
申请号：US10954883
申请日：2004-09-30
IPC分类号： H04L25/49
CPC分类号： H04L27/2003 , H03F1/0211
摘要： In an envelope comparison embodiment, a delay calibrator produces a delay signal based on a comparison of a feedback signal and an envelope component of the transmitted signal. A down-converter produces the feedback signal from an outgoing modulated RF signal based on at least one local oscillation. Envelope detectors in the delay calibrator and the envelope signal path are operably coupled to a summing node that produces a delay error signal based on a temporal difference between the two envelopes. One embodiment includes phase detectors to detect and adjust the zero crossings of the feedback signal and the envelope signal path. As the delay mismatch between the envelope signal path and the phase signal path increases, the power spectrum increases in adjacent communication channels. A mask margin measurement technique measures the power level in an adjacent channel and adjusts the envelope path delay accordingly.
摘要翻译： 在包络比较实施例中，延迟校准器基于反馈信号和发送信号的包络分量的比较产生延迟信号。 下变频器基于至少一个本地振荡产生来自输出调制RF信号的反馈信号。 延迟校准器和包络信号路径中的信封检测器可操作地耦合到求和节点，该求和节点基于两个信封之间的时间差产生延迟误差信号。 一个实施例包括用于检测和调整反馈信号和包络信号路径的过零点的相位检测器。 随着包络信号路径和相位信号路径之间的延迟失配增加，相邻通信信道中的功率谱增加。 掩模余量测量技术测量相邻通道中的功率电平，并相应地调整包络路径延迟。
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公开(公告)号：US07474709B2
公开(公告)日：2009-01-06
申请号：US10837064
申请日：2004-04-30
申请人： Tom Baker , Henrik T. Jensen
发明人： Tom Baker , Henrik T. Jensen
CPC分类号： H04L27/12
摘要： An FSK modulator and applications thereof are disclosed. The FSK modulator comprises a phase-locked loop, a frequency divider module, an image rejection mixer and a summing module. The phase-locked loop is operably coupled to generate a first oscillation from a reference oscillation. The frequency divider module is operably coupled to divide the first oscillation to produce a second oscillation. The image-rejection mixer is operably coupled to mix the second oscillation with a low intermediate oscillation to produce a mixed data signal, and the summing module is operably coupled to sum the mixed data signal with the first oscillation to produce an FSK modulated signal.
摘要翻译： 公开了一种FSK调制器及其应用。 FSK调制器包括锁相环，分频器模块，镜像抑制混频器和求和模块。 锁相环可操作地耦合以从参考振荡产生第一振荡。 分频器模块可操作地耦合以划分第一振荡以产生第二振荡。 图像抑制混频器可操作地耦合以将第二振荡与低中间振荡混合以产生混合数据信号，并且求和模块可操作地耦合以将混合数据信号与第一振荡相加以产生FSK调制信号。
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