公开(公告)号：US20230238300A1

公开(公告)日：2023-07-27

申请号：US17583038

申请日：2022-01-24

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Bret K. Street ,  Kyle K. Kirby

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/544 ,  H01L21/56 ,  H01L25/16 ,  H01L21/603

CPC classification number: H01L23/3736 ,  H01L23/3107 ,  H01L23/544 ,  H01L21/568 ,  H01L21/561 ,  H01L25/16 ,  H01L21/603

Abstract: A semiconductor package can include a semiconductor die stack including a top die and one or more core dies below the top die. The semiconductor package can further include a metal heat sink plated on a top surface of the top die and have a plurality of side surfaces coplanar with corresponding ones of a plurality of sidewalls of the semiconductor die stack. A molding can surround the stack of semiconductor dies and the metal heat sink, the molding including a top surface coplanar with an exposed upper surface of the metal heat sink. The top surface of the molding and the exposed upper surface of the metal heat sink are both mechanically altered. For example, the metal heat sink and the molding can be simultaneously ground with a grinding disc and can show grinding marks as a result.

公开(公告)号：US20230054514A1

公开(公告)日：2023-02-23

申请号：US17405604

申请日：2021-08-18

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Chien Wen Huang

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/29 ,  H01L23/36

Abstract: Semiconductor devices including one or more interfacing segments patterned within an outer protective layer and associated systems and methods are disclosed herein. The one or more interfacing segments may provide attachment interfaces/surfaces for connection pads. The one or more interfacing segments or a portion thereof may remain uncovered or exposed and provide warpage control for the corresponding semiconductor device.

公开(公告)号：US20210183716A1

公开(公告)日：2021-06-17

申请号：US17170120

申请日：2021-02-08

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Bret K. Street ,  Mark E. Tuttle

IPC: H01L23/10 ,  H01L25/065 ,  H01L23/00 ,  H01L23/04 ,  H01L25/00

Abstract: A semiconductor device includes a substrate; a die attached over the substrate; and a metal enclosure continuously encircling a space and extending vertically between the substrate and the die.

公开(公告)号：US10943842B2

公开(公告)日：2021-03-09

申请号：US16775163

申请日：2020-01-28

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Bret K. Street ,  Mark E. Tuttle

IPC: H01L23/00 ,  H01L23/10 ,  H01L25/065 ,  H01L23/04 ,  H01L25/00

Abstract: A semiconductor device includes a substrate including a substrate top surface; interconnects connected to the substrate and extending above the substrate top surface; a die attached over the substrate, wherein the die includes a die bottom surface that connects to the interconnects for electrically coupling the die and the substrate; and a metal enclosure directly contacting and vertically extending between the substrate top surface and the die bottom surface, wherein the metal enclosure peripherally surrounds the interconnects.

公开(公告)号：US10580710B2

公开(公告)日：2020-03-03

申请号：US15693230

申请日：2017-08-31

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Bret K. Street ,  Mark E. Tuttle

IPC: H01L23/00 ,  H01L23/10 ,  H01L25/065 ,  H01L23/04 ,  H01L25/00

Abstract: A semiconductor device includes a substrate including a substrate top surface; interconnects connected to the substrate and extending above the substrate top surface; a die attached over the substrate, wherein the die includes a die bottom surface that connects to the interconnects for electrically coupling the die and the substrate; and a metal enclosure directly contacting and vertically extending between the substrate top surface and the die bottom surface, wherein the metal enclosure peripherally surrounds the interconnects.

公开(公告)号：US10312226B2

公开(公告)日：2019-06-04

申请号：US15728043

申请日：2017-10-09

Applicant: Micron Technology, Inc.

Inventor： Zhaohui Ma ,  Wei Zhou ,  Chee Chung So ,  Soo Loo Ang ,  Aibin Yu

IPC: H01L25/18 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/544 ,  H01L21/683 ,  H01L21/78

Abstract: Methods of protecting semiconductor devices may involve cutting partially through a thickness of a semiconductor wafer to form trenches between stacks of semiconductor dice on regions of integrated circuitry of the semiconductor wafer. A protective material may be dispensed into the trenches and to a level at least substantially the same as a height of the stacks of semiconductor dice. Material of the semiconductor wafer may be removed from a back side thereof at least to a depth sufficient to expose the protective material in the trenches. A remaining thickness of the protective material between the stacks of semiconductor dice may be cut through.

公开(公告)号：US20190067137A1

公开(公告)日：2019-02-28

申请号：US15693230

申请日：2017-08-31

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Bret K. Street ,  Mark E. Tuttle

IPC: H01L23/10 ,  H01L23/00 ,  H01L25/065 ,  H01L23/04 ,  H01L25/00

Abstract: A semiconductor device includes a substrate including a substrate top surface; interconnects connected to the substrate and extending above the substrate top surface; a die attached over the substrate, wherein the die includes a die bottom surface that connects to the interconnects for electrically coupling the die and the substrate; and a metal enclosure directly contacting and vertically extending between the substrate top surface and the die bottom surface, wherein the metal enclosure peripherally surrounds the interconnects.

公开(公告)号：US10153178B2

公开(公告)日：2018-12-11

申请号：US15655736

申请日：2017-07-20

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Zhaohui Ma ,  Aibin Yu

IPC: H01L23/10 ,  H01L21/48 ,  H01L23/373 ,  H01L25/065 ,  H01L25/00 ,  H01L23/433 ,  H01L21/56 ,  H01L23/00 ,  H01L25/18 ,  H01L23/31 ,  H01L23/367 ,  H01L21/78

Abstract: Semiconductor die assemblies with heat sinks are disclosed herein. In one embodiment, a semiconductor die assembly includes a stack of semiconductor dies and a mold material surrounding at least a portion of the stack of semiconductor dies. A heat sink is disposed on the stack of semiconductor dies and adjacent the mold material. The heat sink includes an exposed surface and a plurality of heat transfer features along the exposed surface that are configured to increase an exposed surface area compared to a planar surface.

公开(公告)号：US20180033781A1

公开(公告)日：2018-02-01

申请号：US15728123

申请日：2017-10-09

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma ,  Sony Varghese ,  Jonathan S. Hacker ,  Bret K. Street ,  Shijian Luo

IPC: H01L25/18 ,  H01L21/683 ,  H01L21/78 ,  H01L23/544 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/18 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/18161 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.

公开(公告)号：US09865578B2

公开(公告)日：2018-01-09

申请号：US14730681

申请日：2015-06-04

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma ,  Sony Varghese ,  Jonathan S. Hacker ,  Bret K. Street ,  Shijian Luo

IPC: H01L29/40 ,  H01L25/18 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/544 ,  H01L21/683 ,  H01L21/78

CPC classification number: H01L25/18 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/544 ,  H01L24/81 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68359 ,  H01L2221/68381 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/18161 ,  H01L2224/03 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.