公开(公告)号：US20130141996A1

公开(公告)日：2013-06-06

申请号：US13758211

申请日：2013-02-04

申请人： Curtis Ling ,  Vadim Smolyakov ,  Timothy Gallagher ,  Glenn Gulak

发明人： Curtis Ling ,  Vadim Smolyakov ,  Timothy Gallagher ,  Glenn Gulak

IPC分类号： G11C29/04

CPC分类号： G11C29/00 ,  G06F11/1048 ,  G11C7/1006 ,  G11C29/04 ,  G11C29/76 ,  G11C29/785 ,  G11C2029/0409 ,  G11C2029/4402

摘要： One or more circuits may comprise an array of memory cells corresponding to a particular memory address, and a memory fault mitigation module. The one or more circuits may be operable to write a data block to the array of memory cells. The write operation may comprises a swap of a first portion of the data block with a second portion of the data block in response to a detection that one or more memory cells of the array is faulty, and storing the data block to the array of memory cells after the swap.

摘要翻译： 一个或多个电路可以包括对应于特定存储器地址的存储器单元阵列和存储器故障缓解模块。 一个或多个电路可以用于将数据块写入存储器单元阵列。 响应于阵列的一个或多个存储单元故障的检测，写入操作可以包括数据块的第一部分与数据块的第二部分的交换，并将数据块存储到存储器阵列 互换后的细胞。

公开(公告)号：US20130135535A1

公开(公告)日：2013-05-30

申请号：US13687133

申请日：2012-11-28

申请人： Curtis Ling

发明人： Curtis Ling

IPC分类号： H04N5/50

CPC分类号： H04N5/50 ,  H04N21/42222 ,  H04N21/4384

摘要： A device operable to handle channelized media content may generate a prediction that a first channel will be selected for presentation based on a partially-input channel identifier. The device may process the first channel while concurrently processing a second channel, the second channel having been previously selected for presentation. The prediction may be updated upon input of each character of the channel identifier. The prediction may be based on a position of a user's finger on a remote control and/or based on channels being consumed by consumers in a common demographic with the user. The processing of the first channel may comprise partially decoding the first channel and buffering the partially-decoded first channel. Upon said first channel being selected for presentation, the device may read the partially-decoded first channel from memory, further decode the partially-decoded first channel to recover content, and outputting the recovered content.

摘要翻译： 可操作以处理信道化媒体内容的设备可以产生基于部分输入的信道标识符来选择第一信道以进行呈现的预测。 设备可以处理第一信道同时处理第二信道，第二信道先前被选择用于呈现。 可以在输入信道标识符的每个字符时更新预测。 预测可以基于用户的手指在遥控器上的位置和/或基于消费者在与用户的普通人口中消费的频道。 第一信道的处理可以包括对第一信道进行部分解码并缓冲部分解码的第一信道。 在所述第一信道被选择用于呈现时，设备可以从存储器读取部分解码的第一信道，进一步解码部分解码的第一信道以恢复内容，并输出恢复的内容。

公开(公告)号：US20130122847A1

公开(公告)日：2013-05-16

申请号：US13735388

申请日：2013-01-07

申请人： Kishore Seendripu ,  Raymond Montemayor ,  Sheng Ye ,  Glenn Chang ,  Curtis Ling

发明人： Kishore Seendripu ,  Raymond Montemayor ,  Sheng Ye ,  Glenn Chang ,  Curtis Ling

IPC分类号： H04B1/10

CPC分类号： H04B1/26 ,  H03D3/007 ,  H03D3/008 ,  H03D3/009 ,  H03D7/14 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1475 ,  H03D7/165 ,  H03D7/166 ,  H03D2200/0086 ,  H03H11/22 ,  H04B1/10 ,  H04B1/109 ,  H04B1/12 ,  H04B1/30 ,  H04B15/00 ,  H04J1/18 ,  H04L27/34

摘要： Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

公开(公告)号：US20120302192A1

公开(公告)日：2012-11-29

申请号：US13568286

申请日：2012-08-07

申请人： Kishore Seendripu ,  Raymond Montemayor ,  Sheng Ye ,  Glenn Chang ,  Curtis Ling

发明人： Kishore Seendripu ,  Raymond Montemayor ,  Sheng Ye ,  Glenn Chang ,  Curtis Ling

IPC分类号： H04B1/26

CPC分类号： H04B1/26 ,  H03D3/007 ,  H03D3/008 ,  H03D3/009 ,  H03D7/14 ,  H03D7/1441 ,  H03D7/1458 ,  H03D7/1475 ,  H03D7/165 ,  H03D7/166 ,  H03D2200/0086 ,  H03H11/22 ,  H04B1/10 ,  H04B1/109 ,  H04B1/12 ,  H04B1/30 ,  H04B15/00 ,  H04J1/18 ,  H04L27/34

摘要： Receiver architectures and methods of processing harmonic rich input signals employing harmonic suppression mixers are disclosed herein. The disclosed receivers, mixers, and methods enable a receiver to achieve the advantages of switching mixers while greatly reducing the mixer response to the undesired harmonics. A harmonic mixer can include a plurality of mixers coupled to an input signal. A plurality of phases of a local oscillator signal can be generated from a single local oscillator output. Each of the phases can be used to drive an input of one of the mixers. The mixer outputs can be combined to generate a frequency converted output that has harmonic rejection.

公开(公告)号：US20120294100A1

公开(公告)日：2012-11-22

申请号：US13285945

申请日：2011-10-31

申请人： Curtis Ling ,  Vadim Smolyakov ,  Timothy Gallagher ,  Glenn Gulak

发明人： Curtis Ling ,  Vadim Smolyakov ,  Timothy Gallagher ,  Glenn Gulak

IPC分类号： G11C29/00

CPC分类号： G11C5/144 ,  G06F11/1048 ,  G11C5/14 ,  G11C29/021 ,  G11C29/028 ,  G11C2029/0409

摘要： A method and apparatus for memory power and/or area reduction. An array of memory cells may be scanned to detect faulty memory cells, if any, in the array. A supply voltage Vmem applied to the array of memory cells may be controlled based on a result of the scan, and based on a sensitivity coefficient of one, or more, of the array of memory cells. The sensitivity coefficient may indicate an impact that the one, or more, of the array of memory cells being faulty may have on the performance of a device that reads and writes data to the memory array. Additionally or alternatively, the physical dimensions of the memory cells may be determined based on the sensitivity coefficient(s) and/or based on a number of faulty memory cells that can be tolerated in the array of memory cells.

摘要翻译： 一种用于存储器功率和/或面积减小的方法和装置。 可以扫描存储器单元阵列以检测阵列中的故障存储器单元（如果有的话）。 可以基于扫描的结果并且基于存储器单元阵列中的一个或多个的灵敏度系数来控制施加到存储器单元阵列的电源电压Vmem。 灵敏度系数可以指示存储器单元阵列中的一个或多个存在故障的影响可能对于将数据读取和写入存储器阵列的设备的性能有影响。 附加地或替代地，存储器单元的物理尺寸可以基于灵敏度系数和/或基于可以在存储器单元阵列中容忍的故障存储器单元的数量来确定。

公开(公告)号：US20120294094A1

公开(公告)日：2012-11-22

申请号：US13285864

申请日：2011-10-31

申请人： Curtis Ling ,  Vadim Smolyakov ,  Timothy Gallagher ,  Glenn Gulak

发明人： Curtis Ling ,  Vadim Smolyakov ,  Timothy Gallagher ,  Glenn Gulak

IPC分类号： G11C7/10 ,  G11C7/00 ,  G11C29/00

CPC分类号： G11C29/00 ,  G06F11/1048 ,  G11C7/1006 ,  G11C29/04 ,  G11C29/76 ,  G11C29/785 ,  G11C2029/0409 ,  G11C2029/4402

摘要： A plurality of data lines and a plurality of bit lines may be used to write to and/or read from an array of memory cells. A switching element may select among different mappings between the plurality of data lines and the plurality of bit lines. The array may, for example, consist of N memory cells, the plurality of bit lines may consist of N bit lines, and the plurality of data lines may consist of N data lines, where N is an integer greater than 1. For a write operation in which a data block is to be written to the array, a configuration of the switching element may be controlled based, at least in part, on how sensitive the data block is to a faulty memory cell among the array of memory cells.

摘要翻译： 可以使用多条数据线和多条位线来写入和/或从存储器单元阵列读取。 开关元件可以在多条数据线与多条位线之间的不同映射中进行选择。 阵列可以例如由N个存储器单元组成，多个位线可以由N个位线组成，并且多个数据线可以由N个数据线组成，其中N是大于1的整数。对于写入 至少部分地基于数据块对存储器单元阵列中的故障存储器单元的敏感度来控制开关元件的配置，其中将数据块写入阵列的操作。

公开(公告)号：US20120289177A1

公开(公告)日：2012-11-15

申请号：US13556649

申请日：2012-07-24

申请人： Anand K. Anandakumar ,  Curtis Ling ,  Sugbong Kang

发明人： Anand K. Anandakumar ,  Curtis Ling ,  Sugbong Kang

IPC分类号： H04B1/16

CPC分类号： H04B7/0845 ,  H04B1/16 ,  H04B7/0857 ,  H04B7/0885 ,  H04B7/12 ,  H04L5/0023 ,  H04L5/0048 ,  H04L25/0204 ,  H04L25/03159 ,  H04L25/14 ,  H04L27/2649 ,  H04L2025/03414 ,  H04L2025/03426

摘要： A receiver may comprise a plurality of signal processing paths, a bin-wise combiner, and an inverse transformation block. Each signal processing path may comprise a transformation block that is operable to transform a time-domain digital signal to an associated frequency-domain signal having a plurality of subband signals. The bin-wise combiner may be operable to combine corresponding subband signals of the plurality of signal processing paths. The inverse transformation block may be operable to transform output of the bin-wise combiner to an associated time-domain signal. The transformation block in each said signal processing path may be a Fast Fourier Transform (FFT) block. The number of points used by the FFT block of any one of said plurality of signal processing paths may be based on the delay spread of a signal input to the one of the signal processing paths.

摘要翻译： 接收机可以包括多个信号处理路径，二进制组合器和逆变换块。 每个信号处理路径可以包括可操作以将时域数字信号变换成具有多个子带信号的相关联的频域信号的变换块。 二进制组合器可以可操作以组合多个信号处理路径的相应子带信号。 逆变换块可以用于将二进制组合器的输出变换为相关联的时域信号。 每个所述信号处理路径中的变换块可以是快速傅里叶变换（FFT）块。 所述多个信号处理路径中的任何一个的FFT块所使用的点数可以基于输入到信号处理路径之一的信号的延迟扩展。

公开(公告)号：US08311156B2

公开(公告)日：2012-11-13

申请号：US12831225

申请日：2010-07-06

申请人： Kishore Seendripu ,  Raymond Montemayor ,  Sheng Ye ,  Glenn Chang ,  Curtis Ling

发明人： Kishore Seendripu ,  Raymond Montemayor ,  Sheng Ye ,  Glenn Chang ,  Curtis Ling

IPC分类号： H03D3/00

CPC分类号： H04B1/28 ,  H03D7/166

摘要： A receiver configured to selectively receive an RF signal from an operating band having a plurality of RF channels. The receiver is configured to upconvert the desired RF channel to an intermediate frequency (IF) greater than the RF channel frequencies. The upconverted RF channel is downconverted to baseband or a low IF. The receiver can perform channel selection by filtering the baseband or low IF signal. The baseband or low IF signal can be upconverted to a programmable output IF.

摘要翻译： 一种被配置为从具有多个RF信道的工作频带有选择地接收RF信号的接收机。 接收机被配置为将期望的RF信道上变频到大于RF信道频率的中频（IF）。 上变频的RF信道被下变频到基带或低IF。 接收机可以通过对基带或低IF信号进行滤波来执行信道选择。 基带或低IF信号可以上变频到可编程输出IF。

公开(公告)号：US08229381B2

公开(公告)日：2012-07-24

申请号：US12243692

申请日：2008-10-01

申请人： Curtis Ling ,  Andy Lo ,  Tete Sedalo

发明人： Curtis Ling ,  Andy Lo ,  Tete Sedalo

IPC分类号： H04B1/06 ,  H04B7/00 ,  H04B1/10

CPC分类号： H04B1/16 ,  H04B1/40

摘要： A wireless communication receiver includes a multitude of look-up tables each storing a multitude of DC offset values associated with the gains of an amplification stage disposed in the wireless communication receiver. The entries for each look-up table are estimated during a stage of the calibration phase. During such a calibration stage, for each selected gain of an amplification stage, a search logic estimates a current DC offset number and compares it to a previous DC offset estimate that is fed back to the search logic. If the difference between the current and previous estimates is less than a predefined threshold value, the current estimate is treated as being associated with the DC offset of the selected gain of the amplification stage and is stored in the look-up table. This process is repeated for each selected gain of each amplification stage of interest until the look-up tables are populated.

摘要翻译： 无线通信接收机包括多个查找表，每个查找表存储与设置在无线通信接收机中的放大级的增益相关联的多个DC偏移值。 在校准阶段的阶段估计每个查找表的条目。 在这样的校准阶段期间，对于放大级的每个所选增益，搜索逻辑估计当前DC偏移数，并将其与反馈到搜索逻辑的先前DC偏移估计进行比较。 如果当前和先前估计之间的差值小于预定义的阈值，则将当前估计值视为与放大级的所选增益的DC偏移相关联，并存储在查找表中。 对于感兴趣的每个扩增阶段的每个选定的增益重复该过程，直到查找表被填充。

公开(公告)号：US20120163518A1

公开(公告)日：2012-06-28

申请号：US13336451

申请日：2011-12-23

申请人： Madhukar Reddy ,  Eric Fogleman ,  Curtis Ling

发明人： Madhukar Reddy ,  Eric Fogleman ,  Curtis Ling

IPC分类号： H03D1/04 ,  H04B1/10

CPC分类号： H03D7/165 ,  H03D2200/005 ,  H04B1/1027 ,  H04B15/04 ,  H04B2215/065 ,  H04B2215/068

摘要： A receiver may receive a signal and process each of a plurality of sub-bands of the received signal via a respective one of a plurality of first-type receive chains. The receiver may utilize a signal output by a first one of the plurality of the first-type receive chains to remove undesired signals from a signal output by a second one of the plurality of the first-type receive chains. The undesired signals may comprise aliases and/or harmonics of one or more signals that fall within a sub-band of the first one of the plurality of the first-type receive chains. The receiver may downconvert, filter, and digitize each of the plurality of sub-bands via a corresponding one of the plurality of the first type receive chains. The received signal may encompass the cable television band, and each of the plurality of sub-bands may comprise a plurality of cable television channels.

摘要翻译： 接收机可以经由多个第一类型接收链中的相应一个接收信号并处理接收信号的多个子带中的每个子带。 接收机可以利用由多个第一类型接收链中的第一个接收链的第一个输出的信号，以从由多个第一类型接收链中的第二类接收链输出的信号中去除不需要的信号。 不期望的信号可以包括落入多个第一类型接收链中的第一个的子带内的一个或多个信号的混叠和/或谐波。 接收机可以经由多个第一类型接收链中的对应的一个来对多个子带中的每一个进行下变频，滤波和数字化。 接收的信号可以包括有线电视频带，并且多个子频带中的每一个可以包括多个有线电视频道。