REVERSE CONCATENATION FOR PRODUCT CODES
    91.
    发明申请
    REVERSE CONCATENATION FOR PRODUCT CODES 有权
    产品代码的反向限定

    公开(公告)号:US20080235556A1

    公开(公告)日:2008-09-25

    申请号:US11690619

    申请日:2007-03-23

    IPC分类号: H03M13/00

    摘要: A system is provided to encode data for recording onto media whereby modulation and linear constraints from a concatenated code or product code are imposed. A first array of unencoded user data is generated. Each row is modulation encoded to enforce a first modulation constraint; the array is transformed into a second array which is transformed into a third array having predetermined empty locations in each column interleaved with the modulated data. A C2-parity byte is computed for at least some of the empty locations of the third array and a fourth array is generated. C1-parity symbols in each row are computed, generating a fifth array. A second modulation constraint is enforced on each C1-parity symbol in each row of the fifth array, generating a sixth array. The rows of the sixth array are assembled with header and sync fields for recording onto a recording media.

    摘要翻译: 提供了一种系统来编码用于记录到介质上的数据,由此施加来自级联代码或产品代码的调制和线性约束。 生成第一组未编码的用户数据。 每行被调制编码以执行第一调制约束; 该阵列被变换成第二阵列,该第二阵列被转换成具有与调制数据交错的每列中的预定空位置的第三阵列。 对于第三阵列的至少一些空位置计算C2奇偶校验字节,并且生成第四阵列。 计算每行中的C1奇偶校验符号,生成第五个数组。 在第五阵列的每行中的每个C1奇偶校验符号上强制执行第二调制约束,产生第六阵列。 第六阵列的行与标题和同步字段组合,用于记录到记录介质上。

    Method for a cyclic dibit response estimation in a media system using a data set separator sequence
    92.
    发明授权
    Method for a cyclic dibit response estimation in a media system using a data set separator sequence 失效
    在使用数据集分隔符序列的媒体系统中进行循环双位响应估计的方法

    公开(公告)号:US07428116B2

    公开(公告)日:2008-09-23

    申请号:US11122680

    申请日:2005-05-05

    IPC分类号: G11B5/035

    摘要: A dibit response estimation generator receives a DSS sequence and a DSS readback sequence, which is a function of a channel processing of the DSS sequence by a read channel. The generator generates a cyclic dibit response vector as a function of the DSS sequence and the DSS readback sequence. The generator further generates an error signal as a function of a comparison of the DSS readback sequence and a filtering of the DSS sequence based on the cyclic dibit response vector. An unacceptable error signal indicates a need to adjust the cyclic dibit response vector to yield an acceptable comparison of the DSS readback sequence and the filtering of the DSS sequence based on the cyclic dibit response vector.

    摘要翻译: 双向响应估计生成器接收DSS序列和DSS回读序列,DSS序列是通过读取通道的DSS序列的信道处理的函数。 发生器产生作为DSS序列和DSS回读序列的函数的循环双位响应向量。 发生器还根据DSS回读序列的比较和基于循环双位响应向量的DSS序列的滤波产生误差信号。 不可接受的误差信号表示需要调整循环双位响应向量,以产生DSS回读序列的可接受比较和基于循环双位响应向量的DSS序列的过滤。

    Dynamically adapting a magnetic tape read channel equalizer
    93.
    发明授权
    Dynamically adapting a magnetic tape read channel equalizer 失效
    动态调整磁带读通道均衡器

    公开(公告)号:US07359135B2

    公开(公告)日:2008-04-15

    申请号:US11733934

    申请日:2007-04-11

    IPC分类号: G11B5/35

    CPC分类号: G11B20/10 G11B5/02

    摘要: A read channel equalizer of a magnetic tape drive which equalizes digitally sampled magnetic signals detected by a read head is dynamically adapted. A detector of equalizer dynamic adaptation logic compares equalizer output signals to desired values that are based on the decoding scheme (such as +2, 0 and −2 for PR4) to sense equalizer output signals that are offset from at least one desired value, and signals the fact of each offset and it polarity as amplitude independent error signals. The signaled sensed amplitude independent error signals are fed back to adjustable taps of the equalizer. The simplified error signals thus avoid complex calculations of waveform errors, such as least mean square calculations. The error signals may be weighted and may be adjusted to align synchronously provided error signals with asynchronous taps of the equalizer.

    摘要翻译: 磁头驱动器的读取通道均衡器,其均衡由读取头检测到的数字采样磁信号。 均衡器动态适配逻辑的检测器将均衡器输出信号与基于解码方案(例如PR4的+2,0和-2)的期望值进行比较,以感测与至少一个期望值偏移的均衡器输出信号,以及 将每个偏移的事实表示为与振幅无关的误差信号。 信号感知的与振幅无关的误差信号反馈到均衡器的可调节抽头。 因此,简化的误差信号避免了波形误差的复杂计算,例如最小均方根计算。 误差信号可以被加权并且可以被调整以使同步提供的误差信号与均衡器的异步抽头对齐。

    Data overwriting in probe-based data storage devices

    公开(公告)号:US07099257B2

    公开(公告)日:2006-08-29

    申请号:US10440692

    申请日:2003-05-19

    IPC分类号: G11B7/0045

    摘要: Methods are provided for overwriting data in a probe-based data storage device (1) wherein data is represented by the presence and absence of pits formed in a storage surface (4) by a probe of the device. Input data is first coded such that successive bits of a first value in the coded input data are separated by at least one bit of the other value. Overwrite data bits v0, v1, v2, . . . , are generated from the coded input data bits b0, b1, b2, . . . , and the overwrite data bits v0, v1, v2, . . . , are then used to overwrite data on the storage surface (4). According to a first method, the overwrite data bits are generated such that, if a pit represents a bit of said first value in the data storage device (1) then vi={overscore (b)}i−1, for i≧1 and v0 has said first value, and if a pit represents a bit of said other value in the data storage device (1) then vi=bi−1 for i≧1 and v0 has said other value. According to a second method, the overwrite data bits are generated such that, if a pit represents a bit of said first value in the data storage device (1) then vi={overscore (b)}i−1({overscore (b)}i−2+bi) for i≧2, v0 has said first value and v1={overscore (b)}0, and if a pit represents a bit of said other value in the data storage device (1) then vi={overscore (({overscore (b)}i−1({overscore (b)}i−2+bi)))} for i≧2, v0 has said other value and v1=b0. With both methods, the result of the overwrite operation is to record either the coded input data b0, b1, b2, . . . , or its complement {overscore (b)}0, {overscore (b)}1, {overscore (b)}2, . . . , depending on whether a pit represents a bit having the first value or a bit having the other value. This result is independent of the bit values of the data which is overwritten.

    Techniques for applying modulation constraints to data using periodically changing symbol mappings
    95.
    发明授权
    Techniques for applying modulation constraints to data using periodically changing symbol mappings 有权
    使用周期性变化的符号映射对数据应用调制约束的技术

    公开(公告)号:US07030789B1

    公开(公告)日:2006-04-18

    申请号:US11002970

    申请日:2004-12-01

    IPC分类号: H03M7/02

    摘要: Techniques are provided for applying modulation constraints to data by using periodically changing symbol mappings to replace certain prohibited error prone data patterns. Initially, user data in a first base is mapped to integers of a second base using a base conversion technique. The integers in the second base correspond to symbols. Subsequently, periodically changing symbol mappings are performed during which prohibited symbols generated during base conversion are mapped to permitted symbols. The periodically changing symbol mappings occur in multiple phases, and the prohibited symbols are different in each phase. The resulting data is processed by a precoder in some embodiments.

    摘要翻译: 提供了通过使用周期性变化的符号映射来替代某些禁止的易错数据模式来向数据应用调制约束的技术。 最初,使用基本转换技术将第一基站中的用户数据映射到第二基站的整数。 第二个碱基中的整数对应于符号。 随后,执行周期性地改变的符号映射,其中在基本转换期间产生的禁止符号被映射到允许的符号。 周期性变化的符号映射发生在多个阶段,禁止符号在每个阶段都不同。 在一些实施例中,所生成的数据由预编码器处理。

    Apparatus and method for noise-predictive maximum likelihood detection
    97.
    发明授权
    Apparatus and method for noise-predictive maximum likelihood detection 失效
    用于噪声预测最大似然检测的装置和方法

    公开(公告)号:US06625235B1

    公开(公告)日:2003-09-23

    申请号:US09403628

    申请日:1999-11-02

    IPC分类号: H03D100

    CPC分类号: G11B20/10175 G11B20/10009

    摘要: In a maximum likelihood sequence detector for symbol sequences which were equalized in a PR4 equalizer, noise prediction means (35) are provided including infinite impulse response (IIR) filtering, which have noise-whitening capabilities and are imbedded into the maximum likelihood detection process. The resulting INPML detector (10) can be implemented in digital or analog circuit technology. In addition, a DC-notch filter (44a) and a stochastic gradient procedure can be provided for DC offset compensation and for MR head or signal asymmetry compensation.

    摘要翻译: 在PR4均衡器中均衡的符号序列的最大似然序列检测器中,提供具有无限脉冲响应(IIR)滤波的噪声预测装置(35),其具有噪声增白能力并被嵌入到最大似然检测过程中。 所得到的INPML检测器(10)可以以数字或模拟电路技术实现。 此外,可以提供DC陷波滤波器(44a)和随机梯度程序用于DC偏移补偿和用于MR头或信号不对称补偿。

    Wear-level of cells/pages/sub-pages/blocks of a memory
    98.
    发明授权
    Wear-level of cells/pages/sub-pages/blocks of a memory 有权
    存储器的单元/页/子页/块的磨损级别

    公开(公告)号:US09170933B2

    公开(公告)日:2015-10-27

    申请号:US13700545

    申请日:2011-06-06

    IPC分类号: G06F9/312 G06F12/02 G11C16/34

    摘要: A method for wear-leveling cells, pages, sub-pages or blocks of a memory such as a flash memory includes receiving (S10) a chunk of data to be written on the cell, page, sub-page or block of the memory; counting (S40), in the received chunk of data, a number of times a given type of binary data ‘0’ or ‘1’ is to be written; and distributing (S50) the writing of the received chunk of data among cells, pages, sub-pages or blocks of the memory such as to wear-level the memory with respect to the number of the given type of binary data ‘0’ or ‘1’ counted in the chunk of data to be written.

    摘要翻译: 一种用于对诸如闪速存储器的存储器的单元,页,子页或块进行磨损均衡的方法包括:接收(S10)要写入存储器的单元,页,子页或块的数据块; 在接收到的数据块中计数(S40)多少次给定类型的二进制数据“0”或“1”被写入; 并且分配(S50)在所述存储器的单元,页面,子页面或块之间写入所接收的数据块,以便相对于给定类型的二进制数据“0”的数量对存储器进行磨损级别 “1”计入要写入的数据块中。

    Programming at least one multi-level phase change memory cell
    99.
    发明授权
    Programming at least one multi-level phase change memory cell 有权
    编程至少一个多级相变存储单元

    公开(公告)号:US09064571B2

    公开(公告)日:2015-06-23

    申请号:US13638311

    申请日:2011-03-23

    IPC分类号: G11C11/00 G11C13/00 G11C11/56

    摘要: A method is provided that comprises a step of programming the PCM cell to have a respective definite cell state by at least one current pulse flowing to the PCM cell, said respective definite cell state being defined at least by a respective definite resistance level, a step of controlling said respective current pulse by a respective bitline pulse and a respective wordline pulse, and a step of controlling said respective bitline pulse and said respective wordline pulse dependent on an actual resistance value of the PCM cell and a respective reference resistance value being defined for the definite resistance level.

    摘要翻译: 提供了一种方法,其包括通过流向PCM单元的至少一个电流脉冲对PCM单元进行编程以具有相应的确定单元状态的步骤,所述相应的确定单元状态至少由相应的确定电阻水平限定,步骤 通过相应的位线脉冲和相应的字线脉冲来控制所述各个电流脉冲,以及根据PCM单元的实际电阻值来控制所述各个位线脉冲和所述各个字线脉冲的步骤,以及相应的参考电阻值被定义为 确定阻力位。