公开(公告)号：US08015462B2

公开(公告)日：2011-09-06

申请号：US12149742

申请日：2008-05-07

申请人： Yoshiyuki Nakamura ,  Toshiharu Asaka ,  Toshiyuki Maeda ,  Tomonori Sasaki

发明人： Yoshiyuki Nakamura ,  Toshiharu Asaka ,  Toshiyuki Maeda ,  Tomonori Sasaki

IPC分类号： G01R31/28

CPC分类号： G01R31/31855

摘要： A test circuit including a TAP controller specified in IEEE (Institute of Electrical and Electronics Engineers) 1149 and a test access port includes a first controller including a selecting circuit and a first TAP controller, the selecting circuit generating an internal TMS signal in accordance with TMS signal and selecting an output destination of the internal TMS signal in accordance with a selection signal, and the first TAP controller changing internal state based on the internal TMS signal, testing corresponding test target block in accordance with instruction code for test, and generating the selection signal in accordance with instruction code for selection, and a second controller including a second TAP controller changing internal state based on the internal TMS signal and testing corresponding test target block in accordance with the instruction code for test.

摘要翻译： 包括IEEE（Institute of Electrical and Electronics Engineers）1149中规定的TAP控制器和测试访问端口的测试电路包括：第一控制器，包括选择电路和第一TAP控制器，所述选择电路根据TMS产生内部TMS信号 信号并根据选择信号选择内部TMS信号的输出目的地，并且第一TAP控制器基于内部TMS信号改变内部状态，根据用于测试的指令代码来测试相应的测试目标块，并且生成选择 信号，以及第二控制器，包括第二TAP控制器，其基于内部TMS信号改变内部状态，并根据用于测试的指令代码来测试相应的测试目标块。

公开(公告)号：US20100174958A1

公开(公告)日：2010-07-08

申请号：US12654801

申请日：2010-01-05

申请人： Toshiyuki Maeda ,  Yoshiyuki Nakamura

发明人： Toshiyuki Maeda ,  Yoshiyuki Nakamura

IPC分类号： G01R31/3177 ,  G06F11/25 ,  G06F11/27

CPC分类号： G01R31/318555

摘要： A test circuit includes a plurality of TAP controllers conforming to a standard specification defined in IEEE 1149 and includes a master TAP controller which receives a control code and a test control signal and performs a test on a circuit to be tested and which outputs a shift mode signal, a first slave TAP controller which receives the control code and the test control signal and performs a test on a circuit to be tested, and a first TAP pin control circuit provided to correspond to the first slave TAP controller and which switches between inputting the control code to the first slave TAP controller from the outside and inputting the control code through the master TAP controller, on the basis of the shift mode signal.

摘要翻译： 测试电路包括符合IEEE 1149中定义的标准规范的多个TAP控制器，并且包括主TAP控制器，其接收控制代码和测试控制信号，并对要测试的电路进行测试，并且输出移位模式 信号，第一从属TAP控制器，其接收控制码和测试控制信号并对要测试的电路进行测试;以及第一TAP引脚控制电路，被设置为对应于第一从TAP控制器，并且在第一从属TAP控制器之间进行切换 控制代码从外部到第一从机TAP控制器，并根据移位模式信号通过主TAP控制器输入控制代码。

公开(公告)号：US20100066727A1

公开(公告)日：2010-03-18

申请号：US12513692

申请日：2007-12-06

申请人： Toshiyuki Maeda ,  Hidehiko Shoji

发明人： Toshiyuki Maeda ,  Hidehiko Shoji

IPC分类号： G09G5/00 ,  G09G3/28

CPC分类号： G09G3/2927 ,  G09G3/2803 ,  G09G3/2965 ,  G09G3/298 ,  G09G2310/0267 ,  G09G2320/0238 ,  G09G2320/043

摘要： A scan electrode driving circuit applies a rising ramp waveform voltage to scan electrodes (SCN1 to SCNn) to generate a first setup discharge in a first period within a setup period, applies a dropping ramp waveform voltage to the scan electrodes (SCN1 to SCNn) to generate a second setup discharge in a second period following the first period within the setup period, and applies a positive rectangular waveform voltage (Va) and a negative rectangular waveform voltage (Va) to the scan electrodes (SCN1 to SCNn) in a third period following the second period within the setup period. A data electrode driving circuit applies a positive rectangular waveform voltage (Vd) to data electrodes (D1 to Dm) in a period after application of the positive rectangular waveform voltage (Vs) to the scan electrodes (SCN to SCNn) and before application of the negative rectangular waveform voltage (Va) to the scan electrodes (SCN1 to SCNn) in the third period.

摘要翻译： 扫描电极驱动电路向扫描电极（SCN1〜SCNn）施加上升斜坡波形电压，以在初始化期间内的第一期间产生第一次建立放电，向扫描电极（SCN1〜SCNn）施加下降斜坡波形电压至 在所述建立周期内的所述第一期间之后的第二期间产生第二设定放电，并且在第三期间向所述扫描电极（SCN1〜SCNn）施加正的矩形波形电压（Va）和负的矩形波形电压（Va） 在设定期间之后的第二个时期。 数据电极驱动电路在将正的矩形波形电压（Vs）施加到扫描电极（SCN〜SCNn）之后的期间内施加正的矩形波形电压（Vd）到数据电极（D1〜Dm） 在第三周期中对扫描电极（SCN1〜SCNn）的负矩形波形电压（Va）。

公开(公告)号：US20090040935A1

公开(公告)日：2009-02-12

申请号：US12219586

申请日：2008-07-24

申请人： Junji Murata ,  Toshiyuki Maeda ,  Toshihiro Hakata

发明人： Junji Murata ,  Toshiyuki Maeda ,  Toshihiro Hakata

IPC分类号： G06F11/00

CPC分类号： G01M13/045

摘要： In an evaluation apparatus of a hub unit, a signal processing unit outputs frequency analysis signals which indicate such a result obtained by that an output signal of an acceleration sensor fixed on a hub unit by a magnet is processed via an A/D converting unit and an envelope detecting unit, and thereafter, the processed sensor signal is analyzed for a frequency analysis by an FFT unit. Then, an evaluation output unit evaluates damage conditions of the hub unit based upon signal strengths of specific frequencies, and overall values, which are acquired from the frequency analysis signals, and then, outputs the evaluated damage condition to a display unit.

摘要翻译： 在集线器单元的评估装置中，信号处理单元输出表示通过A / D转换单元处理通过磁体固定在集线器单元上的加速度传感器的输出信号得到的结果的频率分析信号， 包络检测单元，此后，对经处理的传感器信号进行FFT单元的频率分析。 然后，评价输出单元基于特定频率的信号强度和从频率分析信号获取的总体值来评估集线器单元的损坏状况，然后将评估的损坏状况输出到显示单元。

公开(公告)号：US20080295050A1

公开(公告)日：2008-11-27

申请号：US12153596

申请日：2008-05-21

申请人： Toshiyuki Maeda ,  Toshiharu Asaka

发明人： Toshiyuki Maeda ,  Toshiharu Asaka

IPC分类号： G06F17/50

CPC分类号： G01R31/318583

摘要： A method of designing a semiconductor integrated circuit based on the TPI technique, comprising: (A) selecting a target node from a plurality of nodes included in a design circuit; (B) inserting a test point at the target node; (C) designating a delay time with respect to a test point path that is a path connected to the test point; and (D) laying out the design circuit such that a delay time of the test point path becomes the designated delay time. The (A) selecting includes: (A1) calculating delay times of fan-in paths and fan-out paths with respect to each of the plurality of nodes; and (A2) selecting the target node from the plurality of nodes based on the calculated delay times.

摘要翻译： 一种基于TPI技术设计半导体集成电路的方法，包括：（A）从包括在设计电路中的多个节点中选择目标节点; （B）在目标节点插入一个测试点; （C）指定相对于连接到测试点的路径的测试点路径的延迟时间; 和（D）布置设计电路，使得测试点路径的延迟时间变为指定的延迟时间。 （A）选择包括：（A1）计算相对于所述多个节点中的每一个的扇入路径和扇出路径的延迟时间; 和（A2）基于所计算的延迟时间从多个节点中选择目标节点。

公开(公告)号：US20070139978A1

公开(公告)日：2007-06-21

申请号：US10582936

申请日：2004-12-15

申请人： Toshiyuki Maeda ,  Masanobu Tomoe

发明人： Toshiyuki Maeda ,  Masanobu Tomoe

IPC分类号： H02M5/45

CPC分类号： H02M7/48 ,  H02M2001/0048 ,  Y02B70/1491

摘要： Losses are reduced in a current supply circuit including an inverter having a switching element. The dynamic losses in an IGBT element including a free wheeling diode are proportional to the product of turn-on losses and a switching frequency, and the static losses are proportional to the product of a current flowing through the IGBT element and a saturation voltage across a collector and an emitter of the IGBT element. When the breakdown voltage of the IGBT element is increased twice, the saturation voltage across a collector and an emitter does not reach twice as much. Therefore, the static losses can be reduced by increasing a voltage twice and reducing a current by half that are supplied to a load to attain the same power to supplied to the load, with the same dynamic losses.

摘要翻译： 包括具有开关元件的逆变器的电流源电路中的损耗减小。 包括续流二极管的IGBT元件中的动态损耗与导通损耗和开关频率的乘积成正比，静态损耗与流过IGBT元件的电流和跨越IGBT元件的饱和电压的乘积成比例 集电极和IGBT元件的发射极。 当IGBT元件的击穿电压增加两倍时，集电极和发射极两端的饱和电压不会达到两倍。 因此，通过增加两倍的电压并将电流减少一半的电力，以相同的动态损耗来减小提供给负载的相同功率的静态损耗。

公开(公告)号：US20070114966A1

公开(公告)日：2007-05-24

申请号：US11643685

申请日：2006-12-22

申请人： Toshiyuki Maeda ,  Tomoisa Taniguchi

发明人： Toshiyuki Maeda ,  Tomoisa Taniguchi

IPC分类号： H02P27/04

CPC分类号： H02M7/53875 ,  H02M7/53873 ,  H02M7/5395 ,  H02M2001/0009 ,  H02M2007/53876 ,  H02P6/28 ,  H02P27/06

摘要： Apparatus and methods for phase current detection used for driving a motor by supplying outputs from a pulse width modulation (PWM) converter to the motor. One method presented provides detecting a DC link current and a vector pattern, determining whether a voltage vector lengths exceeds a predetermined value, and adjusting the voltage vector by adding a positive or reversed voltage based upon the above determination and an integrated error value.

摘要翻译： 用于通过从脉宽调制（PWM）转换器向电动机提供输出来驱动电动机的相电流检测装置和方法。 提出的一种方法是检测DC链路电流和矢量模式，确定电压矢量长度是否超过预定值，并且基于上述确定和积分误差值，通过加上正电压或反向电压来调整电压矢量。

公开(公告)号：US07173393B2

公开(公告)日：2007-02-06

申请号：US10432949

申请日：2002-09-27

申请人： Toshiyuki Maeda ,  Tomoisa Taniguchi

发明人： Toshiyuki Maeda ,  Tomoisa Taniguchi

IPC分类号： H02P27/04

CPC分类号： H02M7/53875 ,  H02M7/53873 ,  H02M7/5395 ,  H02M2001/0009 ,  H02M2007/53876 ,  H02P6/28 ,  H02P27/06

摘要： Apparatus and methods for phase current detection used for driving a motor by supplying outputs from a pulse width modulation (PWM) converter to the motor. One method presented provides detecting a DC link current and a vector pattern, determining whether a voltage vector lengths exceeds a predetermined value, and adjusting the voltage vector by adding a positive or reversed voltage based upon the above determination and an integrated error value.

摘要翻译： 用于通过从脉宽调制（PWM）转换器向电动机提供输出来驱动电动机的相电流检测装置和方法。 提出的一种方法是检测DC链路电流和矢量模式，确定电压矢量长度是否超过预定值，并且基于上述确定和积分误差值，通过加上正电压或反向电压来调整电压矢量。

公开(公告)号：US20060192512A1

公开(公告)日：2006-08-31

申请号：US11415152

申请日：2006-05-02

申请人： Toshiyuki Maeda

发明人： Toshiyuki Maeda

IPC分类号： H02P7/00

CPC分类号： H02P27/08 ,  H02P6/28 ,  H02P23/0004 ,  H02P27/045

摘要： A voltage detection section and current detection section detect a voltage and current supplied to a motor, and the detected voltage and current are supplied to a position detection section. An angular speed output from the position detection section is supplied to a differentiator to output an angular acceleration. A fundamental wave component extraction section extracts a fundamental wave component of the angular acceleration, and the extracted fundamental wave component is supplied to an amplitude adjustment section. The output of the amplitude adjustment section is subtracted from the average current command by a subtraction section. This subtraction result, current detection value, and the rotor position from the position detection section are supplied to a current control section to carry out the current control operation so as to obtain a current command. The current command is supplied to an inverter to control the voltage and current so as to suppress the speed changing due to the load torque changing. Thus, stability is improved, and a decrease in cost is realized.

公开(公告)号：US6138389A

公开(公告)日：2000-10-31

申请号：US718940

申请日：1996-09-24

申请人： Narutoshi Kanazawa ,  Toshimitsu Kurumizawa ,  Masao Shimizu ,  Toshihide Nakamura ,  Shinichiro Kobayashi ,  Toru Taniguchi ,  Toshiyuki Maeda ,  Hiroaki Matsuyoshi ,  Mitsuaki Yamada ,  Michio Saito

发明人： Narutoshi Kanazawa ,  Toshimitsu Kurumizawa ,  Masao Shimizu ,  Toshihide Nakamura ,  Shinichiro Kobayashi ,  Toru Taniguchi ,  Toshiyuki Maeda ,  Hiroaki Matsuyoshi ,  Mitsuaki Yamada ,  Michio Saito

IPC分类号： D06F75/38

CPC分类号： D06F75/38

摘要： An iron comprising a bottom member as an ironing face, which is provided with a plated metal film containing fluorine compound fine particles, so that the ironing face provides high surface hardness which shows less wear, good slidability and less generation of static electricity.

摘要翻译： 一种熨斗，其包​​括作为熨烫面的底部构件，其设置有包含氟化合物细颗粒的电镀金属膜，使得熨烫面提供较高的表面硬度，其显示较少的磨损，良好的滑动性和较少的静电产生。