公开(公告)号：US20240097876A1

公开(公告)日：2024-03-21

申请号：US18523991

申请日：2023-11-30

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Ariel Shahar ,  Shahaf Shuler ,  Ariel Almog ,  Eitan Hirshberg ,  Natan Manevich

IPC: H04L7/00

CPC classification number: H04L7/0091

Abstract: A communication system includes at least one send queue, containing send queue entries pointing to packets to be transmitted over a network by packet sending circuitry. A clock work queue contains clock queue entries to synchronize sending times of the packets pointed to by the send queue entries. At least one arming queue contains arming queue entries to arm the clock work queue at selected time intervals.

公开(公告)号：US11934333B2

公开(公告)日：2024-03-19

申请号：US17211928

申请日：2021-03-25

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Oren Duer ,  Dror Goldenberg

IPC: G06F13/42 ,  G06F13/38 ,  G06F13/40 ,  H04L67/1097

CPC classification number: G06F13/4221 ,  G06F13/385 ,  G06F13/4081 ,  H04L67/1097

Abstract: A peripheral device includes a host interface and processing circuitry. The host interface is configured to communicate with a host over a peripheral bus. The processing circuitry is configured to expose on the peripheral bus a peripheral-bus device that communicates with the host using a bus storage protocol, to receive, using the exposed peripheral-bus device, Input/Output (I/O) transactions that are issued by the host, and to complete the I/O transactions for the host in accordance with a network storage protocol, by running at least part of a host-side protocol stack of the network storage protocol.

公开(公告)号：US20240086527A1

公开(公告)日：2024-03-14

申请号：US18120807

申请日：2023-03-13

Applicant: Mellanox Technologies, Ltd.

Inventor： Nir Rosen ,  Katya Egert-Berg ,  Rami Ailabouni ,  Ohad Peres ,  Elad Haimovich ,  Vadim Gechman ,  Haim Elisha ,  Adi Peled ,  Chen Rozenbaum ,  Ahmad Saleh ,  Shie Mannor

IPC: G06F21/55 ,  G06F21/52 ,  G06F21/56

CPC classification number: G06F21/554 ,  G06F21/52 ,  G06F21/566 ,  G06F2221/034

Abstract: Apparatuses, systems, and techniques of using one or more circuits (e.g., of a network interface) to obtain assembly code for one or more machine code segments loaded and/or injected into a process, and determine whether the assembly code is likely to perform at least one unauthorized task.

公开(公告)号：US20240080023A1

公开(公告)日：2024-03-07

申请号：US17903165

申请日：2022-09-06

Applicant: Mellanox Technologies Ltd.

Inventor： Boris SHARAV

IPC: H03K5/24

CPC classification number: H03K5/24

Abstract: An electronic circuit may include at least two capacitors arranged in parallel; at least two resistors arranged in series; a positive supply voltage connected to the resistors; a negative supply voltage connected to the resistors, the resistors producing a reference signal; a source circuit producing a source signal and connected to the positive supply voltage and negative supply voltage; and a receiving circuit connected to the positive supply voltage and negative supply voltage, and receiving the source signal and reference signal.

公开(公告)号：US11921662B2

公开(公告)日：2024-03-05

申请号：US17636484

申请日：2019-08-21

Applicant: Mellanox Technologies, Ltd.

Inventor： Dotan Levi ,  Elad Mentovich ,  Ran Ravid ,  Roee Shapiro ,  Avraham Ganor ,  Paraskevas Bakopoulos ,  Dimitrios Kalavrouziotis

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4004 ,  G06F13/42

Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a dynamic data interconnect and networking cable configuration. The dynamic data interconnect includes a substrate, transmitters supported on the substrate configured to generate signals, and receivers supported on the substrate configured to receive signals. The dynamic data interconnect further includes a number of connection pads that receive data cables attached thereto and a number of transmission lanes that operably couple the transmitters and receivers to the connection pads. The dynamic data interconnect further includes transmission circuitry in communication with each of the transmitters and receivers such that, in an operational configuration, the transmission circuitry determines a transmission state of the dynamic data interconnect and selectively disables operation of at least a portion of the transmitters or at least a portion of the receivers.

公开(公告)号：US20240064941A1

公开(公告)日：2024-02-22

申请号：US17892283

申请日：2022-08-22

Applicant: Mellanox Technologies, Ltd.

Inventor： Ran Hasson RUSO ,  Alon RUBINSTEIN ,  Elad MENTOVICH ,  Tahir CADER ,  Siddha GANJU

IPC: H05K7/20 ,  G06N20/00

CPC classification number: H05K7/20836 ,  G06N20/00

Abstract: A system and method for controlling cooling in a server is provided. The method includes receiving one or more server indicators relating to a task to be executed by at least one component of the server. The method also includes determining an expected cooling demand for the at least one component based on the one or more server indicators. The method further includes adjusting a cooling amount provided by a cooling mechanism based on the expected cooling demand of the at least one component. Various embodiments are described herein.

公开(公告)号：US20240063814A1

公开(公告)日：2024-02-22

申请号：US17890337

申请日：2022-08-18

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Vladimir SHALIKASHVILI ,  Ran SANDHAUS

IPC: H03M7/30

CPC classification number: H03M7/6088

Abstract: A data compression system comprising computer memory to store plural compression algorithms and a hardware processor to apply compression algorithm/s to incoming data items, wherein the compression algorithm to be applied to individual data item/s from among the incoming data items is selected, from among the plural compression algorithms, by the hardware processor, depending at least on the individual data item.

公开(公告)号：US11906873B2

公开(公告)日：2024-02-20

申请号：US17694159

申请日：2022-03-14

Applicant: Mellanox Technologies, Ltd.

Inventor： Nikos Argyris ,  Paraskevas Bakopoulos ,  Dimitrios Kalavrouziotis ,  Elad Mentovich

IPC: G02F1/21 ,  G02F1/225 ,  H04B10/50

CPC classification number: G02F1/212 ,  G02F1/225 ,  H04B10/505

Abstract: Embodiments are disclosed for providing a serializer and/or a deserializer with redundancy using optical modulators. An example system includes an MZM structure that comprises a first waveguide interferometer arm structure and a second waveguide interferometer arm structure. The first waveguide interferometer arm structure comprises a first segmented electrode associated with at least a first electrode and a second electrode. The second waveguide interferometer arm structure comprises a second segmented electrode associated with at least a third electrode and a fourth electrode. The MZM structure is configured to convert an optical input signal into an optical output signal through application of a digital data signal to the first electrode and the third electrode, and application of a redundant digital data signal to the second electrode and the fourth electrode.

公开(公告)号：US20240053542A1

公开(公告)日：2024-02-15

申请号：US17900490

申请日：2022-08-31

Applicant: Mellanox Technologies, Ltd.

Inventor： Dimitrios Kalavrouziotis ,  Elad Mentovich ,  Paraskevas Bakopoulos

IPC: G02B6/293 ,  H04B10/50 ,  H04B10/532

CPC classification number: G02B6/29302 ,  H04B10/501 ,  H04B10/532 ,  G02B6/29395 ,  G02B6/29344

Abstract: Optical communication devices and associated methods of manufacturing are provided. An example optical communication device includes a substrate defining a first end and a second end. The optical communication device also includes a primary optical communication medium attached to the second end and a secondary optical communication medium attached to the second end. The optical communication device further includes a signal preclusion component supported by the substrate that selectively preclude signal transmission of optical signals received via the first end to either the primary optical communication medium or the secondary optical communication medium.

公开(公告)号：US11888753B2

公开(公告)日：2024-01-30

申请号：US17398677

申请日：2021-08-10

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Liron Mula ,  Zachy Haramaty ,  Shachar Bar Tikva ,  Dekel Dadon

IPC: H04L12/823 ,  H04L47/32 ,  H04L47/30

CPC classification number: H04L47/32 ,  H04L47/30

Abstract: A relay device is provided that may identify a quantity of empty data byte locations in a data buffer of the relay device. The relay device may receive an indicator associated with transmitting data packets. The relay device may pause or enable a lossless flow of data between the relay device, a host device, and a peer device based on the quantity of empty data byte locations, the indicator, or both. The relay device may include a first data interface coupled with a peer device, a second data interface coupled with a host device, a data buffer configured to store data packets received from the host device, and a state machine that enables a lossless transmission of data between the host device and peer device. The state machine may transmit a pause frame to the host device based on a data buffer utilization reaching a data storage capacity.