公开(公告)号：US20140040564A1

公开(公告)日：2014-02-06

申请号：US14056118

申请日：2013-10-17

Applicant: NetLogic Microsystems, Inc.

Inventor： Gaurav Garg ,  David T. Hass

IPC: G06F12/08

CPC classification number: G06F12/0815 ,  G06F12/0831

Abstract: A system, method, and computer program product are provided for conditionally sending a request for data to a node based on a determination. In operation, a first request for data is sent to a cache of a first node. Additionally, it is determined whether the first request can be satisfied within the first node, where the determining includes at least one of determining a type of the first request and determining a state of the data in the cache. Furthermore, a second request for the data is conditionally sent to a second node, based on the determination.

Abstract translation: 提供了一种系统，方法和计算机程序产品，用于基于确定有条件地向节点发送对数据的请求。 在操作中，向数据的第一请求发送到第一节点的高速缓存。 此外，确定在第一节点内是否可以满足第一请求，其中确定包括确定第一请求的类型并确定高速缓存中的数据的状态中的至少一个。 此外，基于该确定，有条件地将第二请求数据发送到第二节点。

公开(公告)号：US08625320B1

公开(公告)日：2014-01-07

申请号：US13216104

申请日：2011-08-23

Applicant: Dimitri Argyres

Inventor： Dimitri Argyres

IPC: G11C15/00

CPC classification number: G11C15/04

Abstract: Quaternary CAM cells are provided that include a compare circuit having a discharge path between a match line and ground potential, the single discharge path consisting essentially of a single transistor. In an embodiment, the single transistor has a gate coupled to a pull-down node and the compare circuit includes first and second gating transistors connected in series between the pull-down node and a ground potential, the first gating transistor having a gate to receive a comparand bit, and the second gating transistor having a gate to receive a complemented comparand bit.

Abstract translation: 提供了第四纪CAM单元，其包括具有在匹配线和接地电位之间的放电路径的比较电路，单个放电路径基本上由单个晶体管组成。 在一个实施例中，单晶体管具有耦合到下拉节点的栅极，并且比较电路包括串联连接在下拉节点和地电位之间的第一和第二门控晶体管，第一选通晶体管具有门以接收 比较位，并且第二门控晶体管具有用于接收补码比较位的栅极。

公开(公告)号：US08619897B2

公开(公告)日：2013-12-31

申请号：US12331310

申请日：2008-12-09

Applicant: Yehuda Azenkot

Inventor： Yehuda Azenkot

IPC: H04B15/00

CPC classification number: H04B3/23 ,  H03H21/0027

Abstract: A frequency-domain based echo and NEXT canceller is provided. The canceller uses log2 encoding to precondition the error signal representing the echo. An improved gradient constraint is applied on at least a portion of a full weight vector in a least-mean-square algorithm. The least-mean-square algorithm is used to compute filter coefficients. The filter coefficients are multiplied by a frequency-domain data vector using a frequency-domain multiplier to generate frequency-domain output vector.

Abstract translation: 提供基于频域的回波和NEXT消除器。 消除器使用log2编码来预处理表示回波的错误信号。 在最小均方算法中对全权重向量的至少一部分应用改进的梯度约束。 最小均方算法用于计算滤波系数。 使用频域乘法器将滤波器系数乘以频域数据向量以产生频域输出矢量。

公开(公告)号：US08577921B2

公开(公告)日：2013-11-05

申请号：US12567608

申请日：2009-09-25

Applicant: Brian Hang Wai Yang

Inventor： Brian Hang Wai Yang

IPC: G06F17/30

CPC classification number: H04L69/22 ,  Y10S707/99942 ,  Y10S707/99943 ,  Y10S707/99944 ,  Y10S707/99945 ,  Y10S707/99948

Abstract: A search key lookup system including a hash table having a plurality of entries and a function generator is disclosed. The function generator can be coupled to the hash table and configured to receive a key and to provide a first function and a second function. The first function can be a Cyclic Redundancy Code (CRC) type function and the second function can be an Error Checking and Correcting (ECC) type function. Further, an address of the table can include a concatenation of the results of the CRC and the ECC type functions.

公开(公告)号：US20130254484A1

公开(公告)日：2013-09-26

申请号：US13875016

申请日：2013-05-01

Applicant: NetLogic Microsystems, Inc.

Inventor： Gaurav GARG ,  David T. HASS

IPC: G06F12/08

CPC classification number: G06F12/0815 ,  G06F12/0813 ,  G06F12/0831 ,  G06F12/084 ,  G06F2212/1024 ,  G06F2212/2542

Abstract: A system, method, and computer program product are provided for conditionally sending a request for data to a home node. In operation, a first request for data is sent to a first cache of a node. Additionally, if the data does not exist in the first cache, a second request for the data is sent to a second cache of the node. Furthermore, a third request for the data is conditionally sent to a home node

Abstract translation: 提供了一种系统，方法和计算机程序产品，用于有条件地向家庭节点发送数据请求。 在操作中，向数据的第一高速缓存发送第一个数据请求。 此外，如果数据不存在于第一高速缓存中，则将数据的第二请求发送到节点的第二高速缓存。 此外，对数据的第三请求有条件地发送到家庭节点

公开(公告)号：US08516456B1

公开(公告)日：2013-08-20

申请号：US12944442

申请日：2010-11-11

Applicant: Alexei Starovoitov ,  Greg Watson

Inventor： Alexei Starovoitov ,  Greg Watson

IPC: G06F9/45

CPC classification number: G06F8/427 ,  G06F9/3802 ,  G06F9/3808

Abstract: A system and method are disclosed that compiles a sub-expression associated with an inexact pattern contained in a regular expression into a plurality of microprogram instructions that can be stored in contiguous locations of an instruction memory. At least one of the microprogram instructions includes a next instruction address and a fetch length value, where the next instruction address indicates the instruction memory address of the next instruction to be executed and the fetch length value indicates the number of sequentially-executed instructions that are to be fetched from contiguous locations of the instruction memory.

Abstract translation: 公开了一种系统和方法，其将与正则表达式中包含的不精确模式相关联的子表达式编译成可存储在指令存储器的连续位置中的多个微程序指令。 微程序指令中的至少一个包括下一个指令地址和读取长度值，其中下一个指令地址指示要执行的下一个指令的指令存储器地址，并且获取长度值指示顺序执行的指令的数量 从指令存储器的连续位置获取。

公开(公告)号：US08503470B2

公开(公告)日：2013-08-06

申请号：US12716094

申请日：2010-03-02

Applicant: Paolo Narvaez ,  Murat Bog

Inventor： Paolo Narvaez ,  Murat Bog

IPC: H04L12/54

CPC classification number: H04L49/552 ,  H04J3/062 ,  H04J3/12 ,  H04J3/1611 ,  H04J3/1617 ,  H04J2203/0069 ,  H04J2203/0085 ,  H04J2203/0094 ,  H04L12/54 ,  H04L49/351

Abstract: A system and method are provided for performing Local Centre Authorization Service (LCAS) in a network system, the system having a data aligner configured to align bytes of input data according to groups of members. The system also including an LCAS control manager configured to generate de-sequencing control commands in response to data input from the data aligner. The system further including a de-sequencer configured to de-sequence the input data input from the data aligner according to de-sequencing control commands received from the LCAS control manager.

Abstract translation: 提供了一种用于在网络系统中执行本地中心授权服务（LCAS）的系统和方法，所述系统具有数据对准器，其被配置为根据成员组来对齐输入数据的字节。 该系统还包括LCAS控制管理器，该LCAS控制管理器被配置为响应于从数据对准器输入的数据而产生解排序控制命令。 该系统还包括解调器，其被配置为根据从LCAS控制管理器接收的去排序控制命令来对从数据对准器输入的输入数据进行排序。

公开(公告)号：US08503457B2

公开(公告)日：2013-08-06

申请号：US12014685

申请日：2008-01-15

Applicant: Addepalli Sateesh Kumar ,  Chandrasekaran Nageswara Gupta ,  Tushar Ramanlal Shah ,  Debaditya Mukherjee ,  Thomas Yat Chung Woo ,  Khalid Sheikh ,  Jai Prakash Agrawal

Inventor： Addepalli Sateesh Kumar ,  Chandrasekaran Nageswara Gupta ,  Tushar Ramanlal Shah ,  Debaditya Mukherjee ,  Thomas Yat Chung Woo ,  Khalid Sheikh ,  Jai Prakash Agrawal

IPC: H04L12/28

CPC classification number: H04W28/20 ,  H04L1/0003 ,  H04L1/0009 ,  H04L1/0026 ,  H04L12/6402 ,  H04L12/6418 ,  H04Q11/0066 ,  H04Q11/0071 ,  H04Q2011/0033 ,  H04Q2011/0084

Abstract: To more fully utilize the available bandwidth of a network link, network nodes in accordance with the present invention allow TDM data to be combined with packet data. A Packet/TDM cross connect switch, having both a TDM switch and a packet switch, is used in these embodiments. Data packets are transformed into TDM packet columns. The TDM packet columns are combined with standard TDM data columns in the payload of a TDM data frame. Data packets may be sorted based on a priority scheme, in which high priority data packets are given precedence over lower priority data. However, both high priority and low priority may be combined in a TDM packet column.

Abstract translation: 为了更充分地利用网络链路的可用带宽，根据本发明的网络节点允许TDM数据与分组数据组合。 在这些实施例中使用具有TDM交换机和分组交换机的分组/ TDM交叉连接交换机。 数据分组被转换成TDM分组列。 TDM分组列与TDM数据帧的有效载荷中的标准TDM数据列组合。 可以基于优先级方案对数据分组进行排序，其中高优先级数据分组优先于较低优先级的数据。 然而，高优先级和低优先级都可以组合在TDM分组列中。

公开(公告)号：US08462532B1

公开(公告)日：2013-06-11

申请号：US13015543

申请日：2011-01-27

Applicant: Dimitri Argyres

Inventor： Dimitri Argyres

IPC: G11C15/00

CPC classification number: G11C15/04

Abstract: Quaternary CAM cells are provided that include one or more compare circuits that each has a minimal number of pull-down transistors coupled between the match line and ground potential. For some embodiments, the compare circuit includes two parallel paths between the match line and ground potential, with each parallel path consisting of a single pull-down transistor having a gate selectively coupled to the stored data value in response to a comparand value.

Abstract translation: 提供了第四纪CAM单元，其包括一个或多个比较电路，每个比较电路具有耦合在匹配线和地电位之间的最小数量的下拉晶体管。 对于一些实施例，比较电路包括匹配线和地电位之间的两条并行路径，每条并行路径由单个下拉晶体组成，其具有响应于比较值有选择地耦合到所存储的数据值的栅极。

公开(公告)号：US08416846B1

公开(公告)日：2013-04-09

申请号：US12973797

申请日：2010-12-20

Applicant: Andrew Lin ,  Faramarz Bahmani

Inventor： Andrew Lin ,  Faramarz Bahmani

IPC: H04L27/18 ,  H04L27/10 ,  H04L5/16 ,  H04B1/38

CPC classification number: H04L25/03057 ,  H04L25/03885 ,  H04L2025/03579 ,  H04L2025/03687 ,  H04L2025/037

Abstract: A receiver is optimized by adapting the taps of a decision feedback equalizer component within the receiver. Data decisions and error decisions are generated. These data decision and error decisions are used to derive an error rate of data by measuring the number of margin hits that occur. A balance value is also calculated from the data decisions and the error decisions. The balance value is used to update a tap of the decision feedback equalizer. The updating of the tap continues until the number of margin hits has been minimized.

Abstract translation: 接收机通过调整接收机内的判决反馈均衡器组件的抽头来优化。 生成数据决策和错误决策。 这些数据决定和错误决定用于通过测量发生的边缘匹配数来导出数据的错误率。 还可以从数据决策和错误决策中计算余额值。 平衡值用于更新决策反馈均衡器的抽头。 继续更新水龙头，直到保证金点击次数最小化为止。