公开(公告)号：US20050270099A1

公开(公告)日：2005-12-08

申请号：US11137237

申请日：2005-05-25

申请人： Claus Stöger ,  Harald Pretl

发明人： Claus Stöger ,  Harald Pretl

IPC分类号： H03F1/34 ,  H03F3/45 ,  H03F3/68 ,  H03F3/72

CPC分类号： H03F3/45183 ,  H03F1/34 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45296 ,  H03F2203/45512 ,  H03F2203/45652 ,  H03F2203/45726

摘要： An amplifier arrangement is provided having a first differential amplifier stage and a second differential amplifier stage, which are connected to one another with negative feedback. The second differential amplifier stage has a first voltage divider that is connected to the controlled path of the second differential amplifier stage and has at least two signal taps. The second differential amplifier stage also has a second voltage divider with at least two signal taps. Furthermore, a switching device is provided, and is connected to the at least two signal taps of the first voltage divider and to the at least two signal taps of the second voltage divider. The switching device is used to connect one of the at least two signal taps of the first voltage divider to a first output tap of the amplifier arrangement, and one of the at least two signal taps of the second voltage divider to a second output tap of the amplifier arrangement. The overall input impedance can thus be adjusted in a suitable preferred manner.

摘要翻译： 提供了具有第一差分放大器级和第二差分放大器级的放大器装置，它们以负反馈彼此连接。 第二差分放大器级具有连接到第二差分放大器级的受控通路并具有至少两个信号抽头的第一分压器。 第二差分放大器级还具有至少两个信号抽头的第二分压器。 此外，提供开关装置，并且连接到第一分压器的至少两个信号抽头并连接到第二分压器的至少两个信号抽头。 开关装置用于将第一分压器的至少两个信号抽头中的一个连接到放大器装置的第一输出抽头，并且将第二分压器的至少两个信号抽头中的一个连接到第二输出抽头 放大器布置。 因此可以以合适的优选方式调整总输入阻抗。

公开(公告)号：US5986502A

公开(公告)日：1999-11-16

申请号：US193476

申请日：1998-11-17

申请人： Katsufumi Nakamura

发明人： Katsufumi Nakamura

IPC分类号： H03F3/45 ,  H03F3/04

CPC分类号： H03F3/45188 ,  H03F3/4565 ,  H03F3/45659 ,  H03F2203/45296 ,  H03F2203/45298 ,  H03F2203/45398 ,  H03F2203/45508 ,  H03F2203/45536

摘要： A two-stage switched-capacitor CMOS Miller-compensated amplifier uses only n-channel transistors in its signal path to reduce the deleterious effects of parasitic capacitances in the signal path while still obtaining a high transconductance in both stages. A transistor inserted in series with the Miller capacitor between the output and input of the second stage of the amplifier introduces a feedforward zero in the left half of the S-plane of the circuit. By appropriately sizing the aspect ratio and properly biasing this transistor, the second pole of the amplifier is canceled with the introduced zero. Dummy transistors having their sources and drains connected (to serve as capacitors) are cross-connected between opposite polarity inputs and outputs of a differential pair of input transistors in the first stage to effectively cancel the gate-to-drain Miller-multiplied capacitance of the input transistors. A common-mode control current is generated based upon a voltage at a common-source node of a differential pair of input transistors in the second stage. This current is fed back to the first stage to control the common-mode of the first stage.

摘要翻译： 两级开关电容CMOS米勒补偿放大器在其信号路径中仅使用n沟道晶体管，以减少信号路径中寄生电容的有害影响，同时在两级仍然获得高跨导。 在放大器的第二级的输出和输入之间与Miller电容器串联插入的晶体管在电路的S平面的左半部分引入前馈零点。 通过适当地确定纵横比并适当地偏置该晶体管，放大器的第二极通过引入的零被取消。 具有连接源极和漏极（用作电容器）的虚拟晶体管在第一级中的差分输入晶体管的相反极性输入和输出端之间交叉连接，以有效地消除栅极 - 漏极的倍增电容 输入晶体管。 基于第二级中的输入晶体管的差分对的共源极节点处的电压产生共模控制电流。 该电流被反馈到第一级以控制第一级的共模。

公开(公告)号：US5602508A

公开(公告)日：1997-02-11

申请号：US530561

申请日：1995-09-19

申请人： Takefumi Endou ,  Kazuo Watanabe ,  Mitsunari Okazaki

发明人： Takefumi Endou ,  Kazuo Watanabe ,  Mitsunari Okazaki

IPC分类号： H03F1/26 ,  H03F3/04 ,  H03F3/19 ,  H03F3/45

CPC分类号： H03F1/26 ,  H03F3/19 ,  H03F3/45085 ,  H03F2203/45296 ,  H03F2203/45558 ,  H03F2203/45621 ,  H03F2203/45631 ,  H03F2203/45702 ,  H03F2203/45731

摘要： A grounded-base transistor amplifier including a pair of transistors which have the bases thereof grounded at a high frequency and the collectors thereof coupled to a signal output terminal, a high frequency transformer which includes a primary winding connected to a signal input terminal and a secondary winding equipped with a midpoint tap, both ends of the secondary winding being connected to the emitters of the transistors, and a constant-current circuit which is connected to the midpoint tap of the secondary winding and which produces a bias current flow through the transistors. Noise voltages generated by the constant-current circuit are supplied to the emitters of the transistors in the same phase via the secondary winding; therefore, no noise voltage appears at the signal output terminal.

摘要翻译： 一种接地基晶体管放大器，包括一对晶体管，其基极以高频接地，其集电极耦合到信号输出端，高频变压器，其包括连接到信号输入端的初级绕组和次级 绕组配备有中点抽头，次级绕组的两端连接到晶体管的发射极，以及恒流电路，其连接到次级绕组的中点抽头并产生偏流通过晶体管的偏置电流。 由恒流电路产生的噪声电压经由次级绕组以相同的相位提供给晶体管的发射极; 因此，信号输出端子上不出现噪声电压。

公开(公告)号：US4963834A

公开(公告)日：1990-10-16

申请号：US299390

申请日：1989-01-23

申请人： Akira Yukawa

发明人： Akira Yukawa

IPC分类号： H03F3/30 ,  H03F3/45

CPC分类号： H03F3/3032 ,  H03F3/45192 ,  H03F3/45659 ,  H03F2203/45008 ,  H03F2203/45012 ,  H03F2203/45074 ,  H03F2203/45296 ,  H03F2203/45508 ,  H03F2203/45711

摘要： An operational amplifier comprises a differential input stage, first and second folded cascode stages connected to the differential input stage, and first and second output inverting amplifiers. The first output inverting amplifier is driven by the output of the first folded cascode stage, and the second output inverting amplifier is driven through a current mirror by the output of the second folded cascode stage, such that a push pull output stage is provided in the operational amplifier. As a result, a driving performance is much improved in regard to a capacitive load, and a range of an output voltage can be expanded equally to a power supply voltage.

公开(公告)号：US4656436A

公开(公告)日：1987-04-07

申请号：US815238

申请日：1985-12-31

申请人： Veikko R. Saari

发明人： Veikko R. Saari

IPC分类号： H03F3/345 ,  H03F3/26 ,  H03F3/34 ,  H03F3/347 ,  H03F3/45 ,  H03F3/16

CPC分类号： H03F3/45179 ,  H03F3/265 ,  H03F2203/45296 ,  H03F2203/45394 ,  H03F2203/45398 ,  H03F2203/45544

摘要： A transconductance circuit (10) has its signal input terminals (28,40) at the gates of a pairs of MOSFETS (16,22; 32,38) which are forced to operate in the triode mode. The outputs of the triode mode MOSFET pair are fed to a cascode transistor (18,20; 34,36) for treatment as a differential signal. The differential output (30,42) of the cascode transistors is highly linear with respect to the input signal at the gates of the triode mode transistors. Bias voltages for the gates of the cascode transistors are generated by a bias network (14). The transconductance circuit 12 includes a cross-coupled set of compensation capacitors (62, 64; 66, 68) formed from devices with the same geometries as the triode mode transistors to compensate for high frequency loss due to the Miller effect in the input transistors.

摘要翻译： 跨导电路（10）在其被迫在三极管模式下工作的MOSFET对（16,22; 32,38）的栅极处具有其信号输入端（28,40）。 三极管模式MOSFET对的输出馈送到共源共栅晶体管（18,20; 34,36），用于作为差分信号进行处理。 共源共栅晶体管的差分输出（30,42）相对于三极管模式晶体管的栅极处的输入信号是高度线性的。 通过偏压网络（14）产生共源共栅晶体管的栅极的偏置电压。 跨导电路12包括由具有与三极管模式晶体管相同几何形状的器件形成的补偿电容器（62,64,66,68）的交叉耦合组合，以补偿由输入晶体管中的米勒效应导致的高频损耗。