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公开(公告)号：US20220244886A1
公开(公告)日：2022-08-04
申请号：US17167099
申请日：2021-02-04
Applicant: Silicon Motion, Inc.
Inventor： Tsung-Chieh Yang
Abstract: The present invention provides a memory controller configured to access a plurality of channels, wherein each of the channels includes a plurality flash memory chips, and the memory controller includes a flash translation layer and a plurality of control modules. The flash translation layer is configured to generate commands with corresponding physical addresses of at least one of the channels. The plurality of control modules are connected to the plurality of channels, respectively, and each of the control modules operates independently to receive the corresponding command with the corresponding physical address from the flash translation layer, to access the flash memory chips within the corresponding channels.
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102.发明申请公开(公告)号：US20220197835A1
公开(公告)日：2022-06-23
申请号：US17690535
申请日：2022-03-09
Applicant: Silicon Motion, Inc.
Inventor： An-Pang LI
Abstract: A non-volatile memory control technology. In response to a read command, a non-volatile memory interface controller temporarily stores data read from a non-volatile memory to the system memory and, accordingly, asserts a flag in the system memory. Through a flag reading channel provided by a interconnect bus, the host bridge controller confirms that the flag is asserted to correctly read the data from the system memory. A master computing unit reads the system memory through a data reading channel provided by the interconnect bus, without being delayed by the status checking of the flag. The interconnect bus further provides a flag writing channel and a data writing channel.
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公开(公告)号：US11368313B2
公开(公告)日：2022-06-21
申请号：US16869562
申请日：2020-05-07
Applicant: Silicon Motion, Inc.
Inventor： Ching-Ke Chen , Yu-Han Hsiao
Abstract: A data storage device including a non-volatile memory and a micro-controller is provided. The non-volatile memory stores a firmware file. The micro-controller is coupled to the non-volatile memory, and performs an encryption procedure on the firmware file. The encryption procedure includes: using a first key and a first algorithm to encrypt the firmware file to generate a signature, using the first key and a second algorithm to scramble the signature to generate a scrambled signature, and attaching the scrambled signature to the firmware file.
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公开(公告)号：US11366618B2
公开(公告)日：2022-06-21
申请号：US17151677
申请日：2021-01-19
Applicant: Silicon Motion, Inc.
Inventor： Li-Sheng Kan
IPC: G06F3/06
Abstract: The present invention provides a control method of a server, wherein the control method includes the steps of: setting a first node within the server as a master device; setting a second node within the server as a slave device; controlling the first node to receive data from another device via network; storing the data into a first write buffer within the first node; performing a cache mirroring operation to copy the data stored in the first write buffer into a second write buffer within the second node; setting a first tail register and a first head register within the first node, and setting a second tail register and a second head register within the second node; and referring to the first tail register and the first head register to determine if the data stored in the first write buffer is successful written into the second write buffer.
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105.发明授权公开(公告)号：US11347592B2
公开(公告)日：2022-05-31
申请号：US16662874
申请日：2019-10-24
Applicant: Silicon Motion, Inc.
Inventor： Wen-Sheng Lin
IPC: G06F11/14 , G06F11/10 , G06F12/1009 , G06F12/02 , G06F3/06
Abstract: The invention introduces a non-transitory computer program product for handling a sudden power off recovery (SPOR) to include program code to: drive a flash access interface to read pages of a current block in sequence after a power restart subsequent to a sudden power off (SPO); mark the last correct page of the current block according to page read statuses for the current block; configure n1 pages after the next page of the last correct page of the current block as dummy pages; and drive the flash access interface to store data of the last correct page and its previous n2-1 pages of the current block in empty pages after the last dummy page of the current block, wherein any of n1 and n2 is a positive integer.
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Patent Agency Ranking
公开(公告)号：US11335432B2
公开(公告)日：2022-05-17
申请号：US17037795
申请日：2020-09-30
Applicant: Silicon Motion, Inc.
Inventor： Sheng-Yuan Huang
Abstract: A method for selecting bad columns in a data storage medium is provided. The data storage medium is coupled to a control unit, and the data storage medium includes data blocks, wherein each of the data blocks includes columns. The columns are divided into chunks. The method for selecting bad columns in the data storage medium includes following steps. (a) The control unit calculates a number of bad columns in each of the chunks to sorts the chunks, wherein the bad columns are selected from the columns. (b) The control unit sequentially marks or records the bad columns in each of the chunks with bad column groups, wherein a bad column position and a bad column number in each of the chunks are marked or recorded in each of the bad column groups.
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公开(公告)号：US20220137874A1
公开(公告)日：2022-05-05
申请号：US17489088
申请日：2021-09-29
Applicant: SILICON MOTION INC.
Inventor： Hong-Jung HSU
IPC: G06F3/06
Abstract: The present invention provides a method for controlling a data storage device. The data storage device includes a flash memory controller and a flash memory module. The flash memory controller has a first buffer memory and a second buffer memory. The memory module has at least a first memory portion and a second memory portion. The method includes: receiving a first data from a host device; storing the first data in the first buffer memory; transmitting the first data to the first memory portion of the flash memory module from the first buffer memory; and transmitting the first data to a host memory buffer in the host device from the first buffer memory. The first data corresponds to at least a portion of a second data to be written to the second memory portion.
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公开(公告)号：US11323122B2
公开(公告)日：2022-05-03
申请号：US17331577
申请日：2021-05-26
Applicant: Silicon Motion, Inc.
Inventor： Tien-Hsing Yao , Chun-Cheng Lee , Sheng-I Hsu
Abstract: The present invention provides a fractional frequency divider, wherein the fractional frequency divider includes a plurality of registers, a control signal generator and a clock gating circuit. Regarding the plurality of registers, at least a portion of the registers are set to have values. The control signal generator is configured to generate a control signal based on an input clock signal and values in the at least a portion of the registers, wherein the control generator sequentially generates the control signal during each cycle of the input clock signal. The clock gating circuit is configured to refer to the control signal to mask or not mask the input clock signal to generate an output clock signal.
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109.发明授权公开(公告)号：US11314571B2
公开(公告)日：2022-04-26
申请号：US16398280
申请日：2019-04-30
Applicant: Silicon Motion, Inc.
Inventor： An-Pang Li
IPC: G06F7/06 , G06F11/07 , G06F9/32 , G06F13/16 , G06F11/20 , G06F9/48 , G06F9/54 , G06F13/24 , G06F3/06 , G06F11/10
Abstract: A multi-processor system with a distributed mailbox architecture and a communication method thereof are provided. The multi-processor system comprises a plurality of processors, each of the processors is correspondingly configured with an exclusive mailbox and an exclusive channel, and the communication method comprises the following steps. When a first processor of the processors needs to communicate with a second processor, the first processor writes data into the exclusive mailbox of the second processor through a public bus; and when the writing of the data has completed, the exclusive mailbox of the second processor sends an interrupt signal to the second processor, after receiving the interrupt signal, the second processor reads the data in the exclusive mailbox through the corresponding exclusive channel.
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公开(公告)号：US11296725B2
公开(公告)日：2022-04-05
申请号：US16726808
申请日：2019-12-24
Applicant: Silicon Motion, Inc.
Inventor： Shiuan-Hao Kuo
Abstract: A method employed in a low-density parity-check code decoder includes: receiving a specific data portion of a first codeword; calculating a flipping function value of the specific data portion of the first codeword according to the specific data portion by using checking equations of a parity check matrix to calculate checking values of the specific data portion; and determining whether to flip the specific data portion of the first codeword by comparing the flipping function value with a flipping threshold which has been calculated based on a plurality of flipping function values of a plurality of previous data portions earlier than the specific data portion.
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