公开(公告)号：US20200100264A1

公开(公告)日：2020-03-26

申请号：US16142013

申请日：2018-09-26

Applicant: Micron Technology, Inc.

Inventor： Fa-Long Luo ,  Glen E. Hush ,  Aaron P. Boehm

IPC: H04W72/12 ,  H04B1/38 ,  H04W74/08 ,  H04W72/04 ,  G06F3/06

Abstract: Methods, apparatuses, and systems related to wireless main memory for computing are described. A device may include a processor that is wirelessly coupled to a memory array, which may be in a physically separate device. The processor may execute instructions stored in and wirelessly communicated from the memory array. The processor may read data from or write data to the memory array via a wireless communication link (e.g., using resources of an ultra high frequency, super high frequency, and/or extremely high frequency band). Several devices may have a small amount of local memory (or no local memory) and may share, via a wireless communication link, a main memory array. Memory devices may include memory resources and transceiver resources; they may be configured to use one or several communication protocols over licensed or shared frequency spectrum bands, directly (e.g., device-to-device) or indirectly (e.g., via a base station).

公开(公告)号：US20200100078A1

公开(公告)日：2020-03-26

申请号：US16142135

申请日：2018-09-26

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: H04W4/44 ,  G06F15/173 ,  H04B1/38 ,  H04L29/08

Abstract: Apparatuses, systems, and methods related to memory pooling between selected memory resources on vehicles or base stations are described. A system using a memory pool formed as such may enable performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, one apparatus described herein includes a wireless base station coupled to a first processor coupled to a first memory resource that are configured to enable formation of a memory pool to share data between the first memory resource and a second memory resource at a vehicle responsive to a request to access the second memory resource from the first processor transmitted via the base station. The data shared by the second memory resource is determined to enable performance of a particular functionality, stored by the first memory resource, as at least part of a mission profile for transit of the vehicle.

公开(公告)号：US20200099743A1

公开(公告)日：2020-03-26

申请号：US16142590

申请日：2018-09-26

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: H04L29/08 ,  H04W4/46 ,  G06F15/173

Abstract: Apparatuses, systems, and methods related to a data center using a memory pool between selected memory resources are described. A data center using a memory pool between selected memory resources may enable performance of functions, including automated functions critical for prevention of damage to product, personal safety, and/or reliable operation, based on increased access to data that may improve performance of a mission profile. For instance, a method described herein includes transmitting, from a processor at a first vehicle that comprises the processor and memory, a request to access a pool of memory resources configured from a plurality of vehicles each having a local processor and memory, receiving, from a second vehicle of the plurality of vehicles, an indication to access the pool of memory resources, and reading data from or writing data to the memory at the second vehicle using the processor at the first vehicle based at least in part on receiving the indication to access the pool of memory resources.

公开(公告)号：US10437557B2

公开(公告)日：2019-10-08

申请号：US15885316

申请日：2018-01-31

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: G11C7/10 ,  G06F7/20 ,  G06F1/30 ,  H03K19/173 ,  G06F3/06

Abstract: Apparatuses, systems, and methods related to determination of a match between data values stored by several arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by two arrays selected from the plurality to determine whether there is a match between the data values stored by the two arrays. The apparatus further includes an output component configured to output data values of one of the two arrays responsive to determination of the match between the data values stored by the two arrays.

公开(公告)号：US20190235836A1

公开(公告)日：2019-08-01

申请号：US15885316

申请日：2018-01-31

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: G06F7/20 ,  G06F1/30 ,  G06F3/06 ,  H03K19/173

CPC classification number: G06F7/20 ,  G06F1/30 ,  G06F3/0617 ,  G06F3/0688 ,  H03K19/1733

Abstract: Apparatuses, systems, and methods related to determination of a match between data values stored by several arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by two arrays selected from the plurality to determine whether there is a match between the data values stored by the two arrays. The apparatus further includes an output component configured to output data values of one of the two arrays responsive to determination of the match between the data values stored by the two arrays.

公开(公告)号：US10204667B1

公开(公告)日：2019-02-12

申请号：US15666375

申请日：2017-08-01

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: G11C7/06 ,  G11C7/22

Abstract: A memory device is provided. The memory device includes one or more memories and a connector operably coupled to the one or more memories and configured to receive signals including a first reference clock signal from a connected host. The memory device further includes circuitry configured to determine a frequency of the first reference clock signal. The circuitry can be configured to generate a second reference clock signal and to compare the first and second reference clock signals to determine the frequency of the first reference clock signal. The memory devices can further include circuitry configured to adjust one or more operating characteristics of the memory device in response to the determined frequency of the first reference clock signal.

公开(公告)号：US09159397B2

公开(公告)日：2015-10-13

申请号：US13693865

申请日：2012-12-04

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Jeffrey P. Wright

IPC: G11C7/00 ,  G11C11/406

CPC classification number: G11C11/40615 ,  G11C7/00 ,  G11C11/406 ,  G11C11/40607 ,  G11C11/40611

Abstract: Apparatuses and methods for memory refreshing memory cells is described. An example method includes receiving a self refresh command at a memory. The method further includes refreshing the memory at a first refresh rate after receiving the self refresh command. The method further includes refreshing the memory at a second refresh rate in response to a determination that each memory cell of the memory has been refreshed at the first refresh rate. The first refresh rate is greater than a second refresh rate.

Abstract translation: 描述了用于存储器刷新存储器单元的装置和方法。 一种示例性方法包括在存储器处接收自刷新命令。 该方法还包括在接收到自刷新命令之后以第一刷新速率刷新存储器。 该方法还包括响应于确定存储器的每个存储器单元已经以第一刷新率刷新的第二刷新率刷新存储器。 第一次刷新率大于第二次刷新率。

公开(公告)号：US20250157514A1

公开(公告)日：2025-05-15

申请号：US18954321

申请日：2024-11-20

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Scott E. Schaefer ,  Scott D. Van De Graaff ,  Mark D. Ingram ,  Todd Jackson Plum

IPC: G11C7/24 ,  G11C7/04 ,  G11C7/10

Abstract: Methods, systems, and devices for memory traffic monitoring are described. The monitoring may include traffic monitoring of access operations performed at various components of the memory device, or may include sensors that may measure parameters of components of the memory device to detect wear. The traffic monitoring or the parameters measured by the sensors may be represented by a characteristic related to an operational bias of circuits of the memory device. The memory device may use the characteristic (e.g., along with a threshold) to determine whether to adjust a parameter associated with performing access operations received by the memory device, in order to implement a corrective action.

公开(公告)号：US12299325B2

公开(公告)日：2025-05-13

申请号：US17464334

申请日：2021-09-01

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Todd Jackson Plum ,  Scott D. Van De Graaff ,  Scott E. Schaefer ,  Mark D. Ingram

IPC: G06F3/06

Abstract: Methods, systems, and devices for operating frequency monitoring for memory devices are described for monitoring one or more operating frequency ranges experienced by a memory device. The memory device may include monitoring circuitry or logic that may identify one or more durations of operating the memory device within the one or more operating frequency ranges. The memory device may store an indication of the one or more durations, or an indication of information associated with the one or more durations. The indication may be accessed a host device associated with the memory device or may be transmitted by the memory device to the host device. The host device may use information included in the indication to perform an operation associated with the memory device.

公开(公告)号：US20250094649A1

公开(公告)日：2025-03-20

申请号：US18962771

申请日：2024-11-27

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Lance W. Dover ,  Steffen Buch

IPC: G06F21/79 ,  G06F21/60 ,  G06F21/64 ,  G06F21/72 ,  G06F21/78 ,  H04L9/06 ,  H04L9/08 ,  H04L9/32

Abstract: Methods, systems, and devices for safety and security for memory are described. In some examples, data associated with a memory device may be authenticated before an associated operation is executed. The data may be authenticated before it is executed at a volatile memory. The data may be associated with a hash (e.g., a first hash) and may be communicated from the memory device to a host device. At the host device, the data and the first hash may be written (e.g., stored) to temporary storage, such as a cache. Once stored to the cache, the host device may generate an additional hash (e.g., a second hash) related to the data using a key inaccessible to the memory device. If the first hash and second hash match, the data may be authenticated and one or more operations may be executed.