Abstract:
At least one embodiment includes a non-volatile memory cell array, a write buffer configured to store data being written into the non-volatile memory cell array, and a write unit configured to write data into the non-volatile memory cell array. The write unit is configured to perform writing of data such that each data will have reached a stable storage state in the non-volatile memory prior to being over-written in the write buffer.
Abstract:
A method and apparatus for determining a shaken image by using auto focusing. The method includes calculating a maximum AF value of a preview image and a maximum AF value of a captured image that is down-sampled according to the preview image and comparing the maximum AF value of the preview with the maximum AF value of the captured image to determine whether the captured image is shaken or not.
Abstract:
Provided are a digital photographing apparatus capable of taking a self-shot, a method of controlling the same, and a recording medium storing a program to execute the method. A digital photographing apparatus includes a shooting unit, configured to generate a live image of a subject; a main display unit, configured to display the generated image; an auxiliary display unit mounted on a front of the digital photographing apparatus and configured to display the generated image; a determination unit configured to determine whether the auxiliary display unit is switched on or off; and a self-shot setting unit configured to set a self-shot mode when the auxiliary display unit is switched from an ‘off’ state to an ‘on’ state.
Abstract:
A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract:
Disclosed are a humidity sensor and a fabricating method thereof. The humidity sensor includes a substrate, an anodic aluminum oxide layer formed on the substrate and having a plurality of holes, and electrodes formed on the anodic aluminum oxide layer, in order to improve sensitivity and accuracy of the humidity sensor. Further, the fabricating method of a humidity sensor includes preparing an aluminum substrate, forming an anodic aluminum oxide layer by oxidizing the aluminum substrate, and forming electrodes on the anodic aluminum oxide layer.
Abstract:
A resistance-change random access memory device includes a resistance-change memory cell array having a plurality of resistance-change memory cells, where a plurality of word lines are connected to respective first terminals of the plurality of resistance-change memory cells. A plurality of bit lines are disposed perpendicular to the word lines and connected to respective second terminals of the plurality of resistance-change memory cells. The device also includes a plurality of discharge elements that are capable of connecting or disconnecting respective bit lines from a discharge voltage, where the discharge elements connect the respective bit lines to the discharge voltage before write and read operations.
Abstract:
A method of operating a phase change random access memory (PRAM) device comprises performing a program operation to store data in selected PRAM cells of the device, wherein the program operation comprises a plurality of sequential program loops. The method further comprises suspending the program operation in the middle of the program operation, and after suspending the program operation, resuming the program operation in response to a resume command.
Abstract:
A nonvolatile memory device may include a memory cell array having a plurality of nonvolatile memory cells arranged in a matrix including a plurality of rows of the nonvolatile memory cells. Each of a plurality of word lines may be coupled with nonvolatile memory cells of a respective row of the matrix. A row decoder may be coupled to the plurality of word lines with the row decoder being configured to disable at least one of the word lines using a row bias having a level that is adjusted responsive to changes in temperature. Such a nonvolatile memory device may operate with reduced standby currents.
Abstract:
Circuit for compensating a display defect in a video display device of the present invention includes a memory having position information on a plurality of regular patterned defective regions of a display panel, gray scale section information, a defect level data on each of the regular patterned defective regions, and a plurality of compensation data on each of the defect level data stored therein, a first compensation unit, upon reception of data to be displayed on the regular patterned defective regions, for determining defect level data on the regular patterned defective regions of the data to be displayed, selecting a compensation data set on the defect level data determined thus, and selecting a compensation data on the data to be displayed from the compensation data selected thus, for compensating the data to be displayed, and a second compensator for distributing the data compensated thus at the first compensation unit spatially and temporally by using dither patterns for making fine compensation, thereby suppressing size increase of the compensation data.
Abstract:
A nonvolatile memory device may include a memory cell array with a plurality of nonvolatile memory cells arranged in an array of rows and columns. Each of a plurality of bit lines may be coupled to nonvolatile memory cells in a respective one of the columns of the array, and each of a plurality of column selection switches may be coupled to a respective one of the bit lines. A column decoder may be coupled to the plurality of column selection switches, and the column decoder may be configured to select a first one of the bit lines using a first column selection signal having a first signal level applied to a first one of the column selection switches. The column decoder may be further configured to select a second one of the bit lines using a second column selection signal having a second signal level applied to a second one of the column selection switches with the second signal level being different than the first signal level.