Abstract:
A parallel-processing apparatus and method provide for synchronous replication in a database management system (DBMS). During synchronous replication into the active node and the standby node in the DBMS, replications of transactions are parallelized in units of transactions, thereby improving a performance of the DBMS, guaranteeing atomicity and consistency of the transaction, and solving the deadlock state which may occur in parallel-processing.
Abstract:
A method and system for adjusting a gray-scale level of an LCD device. The method includes: checking a default gray-scale value A; comparing default brightness value YA with a target brightness value YX; inputting a trial gray-scale value B; and outputting a target gray-scale value X. The method employs a preselected Similarity of Triangles technique. The system employs a image-capturing unit determining screen brightness and a control unit using a preselected Similarity of Triangles technique to adjust the gray-scale level of a connected display device, reducing a single-screen-capture gray-scale level adjustment interval to about 1.8 to 2.1 seconds.
Abstract:
Disclosed is a device, method and computer-readable medium relocating Remote Procedure Call (RPC) data in a heterogeneous multiprocessor System-on-Chip (MPSoC). The method, for example, includes determining a memory where data is to be stored based on a use of a parameter of a function, and data access patterns of a function caller and a function callee, and storing the data in the determined memory.
Abstract:
A method and apparatus for detecting errors in an application software of an embedded system are provided. The method of detecting errors in an application software includes determining a development language of the application software and an operating system on which the application software is executed; replacing an error detection syntax inserted in order to examine an error in a predetermined function of the application software, with an error detection syntax according to the result of the determination; and performing exception handling for an error occurring in the function according to the result of the replacement, and logging error information according to the exception handling. According to the method and apparatus, an error can be automatically detected and logged irrespective of a development language and an operating system.
Abstract:
The present invention relates to a simple and small cylinder pump, which can stably supply a medical fluid regardless of the installed height of a liquid container or a blood bag. The cylinder pump includes an upper casing, and a lower casing coupled to the upper casing. An upper rotation member is rotatably inserted in the upper casing. A lower rotation member slidingly contacting the upper rotation member is rotatably inserted in the lower casing. An inner wall of the upper casing, a lower outer surface of the upper rotation member, an inner wall of the lower casing, and an upper outer surface of the rotation member constitute a cylinder having a single-tube shape. Plungers are installed on the upper rotation member and on the lower rotation member, respectively, and rotate in the cylinder, the ends of which are closed.
Abstract:
A docking station which is electrically connected to a computer main body unit of a portable computer, the docking station includes a docking main body which supports a rear area of the computer main body unit against an installation surface and is electrically connected with the computer main body unit, and an angle adjusting unit which is rotatably coupled to the docking main body to adjust an installation angle of the docking main body with respect to the installation surface.
Abstract:
A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
Abstract:
A synchronization scheduling apparatus and method in a real-time multi-core system are described. The synchronization scheduling apparatus may include a plurality of cores, each having at least one wait queue, a storage unit to store information regarding a first core receiving a wake-up signal in a previous cycle among the plurality of cores, and a scheduling processor to schedule tasks stored in the at least one wait queue, based on the information regarding the first core.
Abstract:
Example embodiments provide a method and apparatus of correcting error data due to charge loss within a non-volatile memory device including a plurality of memory cells. The method of correcting error data within the non-volatile memory devices may include detecting error data in a second data group by comparing a first data group read from memory cells in response to a first voltage with the second data group read from memory cells in response to a second voltage. The second voltage is higher than the first voltage. Error data in the first data group is detected by error-correcting code (ECC). Re-writing data in the memory cells is performed by correcting error data in the first data group and error data in the second data group. A central processing unit (CPU) may detect error in the second data group. The second data group may be read through a page buffer and compared with the first data group stored in a SRAM. The detected error may be updated to the page buffer. Error data in the first data group may be updated to the page buffer. The CPU corrects error in the final error data, and the page buffer rewrites the corrected data in the plurality of memory cells.
Abstract:
A buffer memory includes a memory cell array, a flag cell array, and a error correction block. The memory cell array has a plurality of word lines. Each of the plurality of word lines are electrically connected to a plurality of memory cells storing data. The flag cell array has a plurality of flag cells. Each of the plurality of flag cells is connected to each of the word lines and stores information that indicates whether error correction of the data has been performed. The error correction block performs error correction on the data output from the memory cell array in response to a command received through a host interface and flag data output from the flag cell array.