Abstract:
A hacking detecting device includes a metal line capacitor, a charge providing unit, a charge storing unit and a hacking deciding unit. The metal line capacitor has a first metal line and a second metal line. The charge providing unit periodically charges the metal line capacitor. The charge storing unit accumulates charges periodically stored in the metal line capacitor, and generates an output voltage corresponding to an amount of the accumulated charges. The hacking deciding unit determines whether the metal line capacitor is exposed based on the output voltage of the charge storing unit.
Abstract:
Provided is a method and apparatus for preventing a stack overflow in an embedded system. The method of preventing a stack overflow includes: reading a maximum stack usage of at least one function for executing a requested operation from maximum stack usages of functions provided from a kernel, which are stored in advance; and processing the requested operation on the basis of the read maximum stack usage of the at least one function and a size of a usable region in a stack for the requested operation. Accordingly, the stack overflow can be prevented without generating a run-time overhead.
Abstract:
A scheduling method, medium and apparatus are provided. In the scheduling method, medium and apparatus, it is possible to prevent the possibility that the order between the priorities of the tasks represented by the expired timers and the tasks requested by the interrupt is reversed while also not deteriorating the performance of a real time operating system (RTOS), even though the number of timers expired when the interrupt occurs or that are already expired before the interrupt occurs is large, by selecting a timer for representing a point of time corresponding to a point of time when an interrupt occurs from among one or more timers each of which representing a task, a point of time assigned to the tasks, and a priority assigned to the task and executing a task represented by the selected timer and one or more tasks requested by the interrupt in order of priority.
Abstract:
A phase locked loop (PLL) integrated circuit includes a voltage-controlled oscillator (VCO) configured to generate a clock signal at an output terminal thereof. The VCO is further configured to improve the frequency response of the PLL by varying a capacitance of the output terminal concurrently with changing a frequency of the clock signal. The VCO may include a control signal generator, which is configured to generate a plurality of control signals in response to UP and DOWN pumping signals, and an oscillator, which is configured to generate the clock signal in response to the plurality of control signals. The oscillator may be a ring oscillator, which is responsive to the plurality of control signals.
Abstract:
A method and apparatus for detecting errors in an application software of an embedded system are provided. The method of detecting errors in an application software includes determining a development language of the application software and an operating system on which the application software is executed; replacing an error detection syntax inserted in order to examine an error in a predetermined function of the application software, with an error detection syntax according to the result of the determination; and performing exception handling for an error occurring in the function according to the result of the replacement, and logging error information according to the exception handling. According to the method and apparatus, an error can be automatically detected and logged irrespective of a development language and an operating system.
Abstract:
A docking station which is electrically connected to a computer main body unit of a portable computer, the docking station includes a docking main body which supports a rear area of the computer main body unit against an installation surface and is electrically connected with the computer main body unit, and an angle adjusting unit which is rotatably coupled to the docking main body to adjust an installation angle of the docking main body with respect to the installation surface.
Abstract:
Example embodiments provide a method and apparatus of correcting error data due to charge loss within a non-volatile memory device including a plurality of memory cells. The method of correcting error data within the non-volatile memory devices may include detecting error data in a second data group by comparing a first data group read from memory cells in response to a first voltage with the second data group read from memory cells in response to a second voltage. The second voltage is higher than the first voltage. Error data in the first data group is detected by error-correcting code (ECC). Re-writing data in the memory cells is performed by correcting error data in the first data group and error data in the second data group. A central processing unit (CPU) may detect error in the second data group. The second data group may be read through a page buffer and compared with the first data group stored in a SRAM. The detected error may be updated to the page buffer. Error data in the first data group may be updated to the page buffer. The CPU corrects error in the final error data, and the page buffer rewrites the corrected data in the plurality of memory cells.
Abstract:
A method and apparatus for managing a memory are provided. It is possible to rapidly recover the area allocated or desired to be returned by easily recognizing a range of the area allocated or desired to be returned over the entire area of the memory by recognizing an original area of a predetermined memory chunk interrupted by a neighboring memory chunk among a series of memory chunks that make up the memory by considering an original area of the neighboring memory chunk and by recovering the predetermined memory chunk and the recognized area to their original areas, when the area allocated to or returned by an application program is interrupted.
Abstract:
A docking station which is electrically connected to a computer main body unit of a portable computer, the docking station includes a docking main body which supports a rear area of the computer main body unit against an installation surface and is electrically connected with the computer main body unit, and an angle adjusting unit which is rotatably coupled to the docking main body to adjust an installation angle of the docking main body with respect to the installation surface.
Abstract:
Provided is a method of managing memory in a multiprocessor system on chip (MPSoC). According to an aspect of the present invention, locality of memory can be reflected and restricted memory resources can be efficiently used by determining a storage location of a variable or a function which corresponds to a symbol with reference to a symbol table based on memory access frequency of the variable or the function, comparing the determined storage location and a previous storage location, and copying the variable or the function stored in the previous storage location to the determined storage location if the determined storage location is different from the previous storage location.