Temperature dependent system for reading ST-RAM
    111.
    发明授权
    Temperature dependent system for reading ST-RAM 失效
    读取ST-RAM的依赖温度的系统

    公开(公告)号:US07755965B2

    公开(公告)日:2010-07-13

    申请号:US12250036

    申请日:2008-10-13

    IPC分类号: G11C7/04 G11C11/00 G11C7/02

    摘要: A memory device that includes at least one memory cell, the memory cell includes: a magnetic tunnel junction (MTJ); and a transistor, wherein the transistor is operatively coupled to the MTJ; a bit line; a source line; and a word line, wherein the memory cell is operatively coupled between the bit line and the source line, and the word line is operatively coupled to the transistor; a temperature sensor; and control circuitry, wherein the temperature sensor is operatively coupled to the control circuitry and the control circuitry and temperature sensor are configured to control a current across the memory cell.

    摘要翻译: 一种包括至少一个存储单元的存储器件,所述存储单元包括:磁性隧道结(MTJ); 和晶体管,其中所述晶体管可操作地耦合到所述MTJ; 有点线 源线; 和字线,其中所述存储器单元可操作地耦合在所述位线和所述源极线之间,并且所述字线可操作地耦合到所述晶体管; 温度传感器; 以及控制电路,其中所述温度传感器可操作地耦合到所述控制电路,并且所述控制电路和温度传感器被配置为控制横跨所述存储器单元的电流。

    MICRO MAGNETIC DEVICE WITH MAGNETIC SPRING
    112.
    发明申请
    MICRO MAGNETIC DEVICE WITH MAGNETIC SPRING 审中-公开
    具有磁性弹簧的微型磁性装置

    公开(公告)号:US20100124352A1

    公开(公告)日:2010-05-20

    申请号:US12270966

    申请日:2008-11-14

    IPC分类号: H04R1/00

    CPC分类号: H04R13/00 H04R2201/003

    摘要: A micro magnetic device having a body defining at least part of an enclosed chamber, the body comprising a first sidewall and a second sidewall. A pole comprising a soft magnetic material is within the chamber and an electrically conductive coil is positioned around the pole. A diaphragm is connected to the first sidewall and a permanent dipole magnet is connected to the second sidewall at a first end and to the diaphragm at a second end. The dipole magnet is offset centrally from the pole. The diaphragm may also be offset centrally from the first pole. The micro magnetic device may be made by MEMS or thin film techniques.

    摘要翻译: 一种具有限定至少一部分封闭室的主体的微型磁性装置,该主体包括第一侧壁和第二侧壁。 包括软磁性材料的极点在腔室内,并且导电线圈围绕极点定位。 隔膜连接到第一侧壁,并且永久偶极子磁体在第一端处连接到第二侧壁并在第二端连接到隔膜。 偶极子磁体从极点中心偏移。 隔膜也可以从第一极中心偏移。 微型磁性器件可以由MEMS或薄膜技术制成。

    STRAM with Self-Reference Read Scheme
    114.
    发明申请
    STRAM with Self-Reference Read Scheme 有权
    STRAM与自参考读取方案

    公开(公告)号:US20100110784A1

    公开(公告)日:2010-05-06

    申请号:US12390006

    申请日:2009-02-20

    IPC分类号: G11C11/14 G11C11/416

    CPC分类号: G11C11/1673

    摘要: Self-reference reading a magnetic tunnel junction data cell methods are disclosed. An illustrative method includes applying a read voltage across a magnetic tunnel junction data cell and forming a read current. The magnetic tunnel junction data cell has a first resistance state. The read voltage is sufficient to switch the magnetic tunnel junction data cell resistance. The method includes detecting the read current and determining if the read current remains constant during the applying step. If the read current remains constant during the applying step, then the first resistance state of the magnetic tunnel junction data cell is the resistance state that the read voltage was sufficient to switch the magnetic tunnel junction data cell to.

    摘要翻译: 公开了自参考读取磁隧道结数据单元方法。 一种说明性方法包括在磁性隧道结数据单元上施加读取电压并形成读取电流。 磁性隧道结数据单元具有第一电阻状态。 读取电压足以切换磁性隧道结数据单元电阻。 该方法包括检测读取电流并确定在施加步骤期间读取电流是否保持恒定。 如果在施加步骤期间读取电流保持恒定,则磁性隧道结数据单元的第一电阻状态是读取电压足以将磁性隧道结数据单元切换到的电阻状态。

    COMPUTER MEMORY DEVICE WITH STATUS REGISTER
    115.
    发明申请
    COMPUTER MEMORY DEVICE WITH STATUS REGISTER 有权
    具有状态寄存器的计算机存储器件

    公开(公告)号:US20100095050A1

    公开(公告)日:2010-04-15

    申请号:US12252170

    申请日:2008-10-15

    IPC分类号: G06F12/02

    摘要: Method and apparatus for operating a memory device with a status register. In some embodiments, the memory device has a plurality of individually programmable non-volatile memory cells comprised of at least a resistive sense memory. The memory device engages an interface and maintains a status register in some embodiments by logging at least an error or busy signal during data transfer operations.

    摘要翻译: 用于操作具有状态寄存器的存储器件的方法和装置。 在一些实施例中,存储器件具有由至少电阻式感测存储器组成的多个单独可编程的非易失性存储器单元。 在一些实施例中,存储器装置接合接口并维持状态寄存器,在数据传输操作期间至少记录错误或忙信号。

    Predicate based group management
    116.
    发明授权
    Predicate based group management 有权
    基于谓词的组管理

    公开(公告)号:US07596584B2

    公开(公告)日:2009-09-29

    申请号:US11789603

    申请日:2007-04-25

    IPC分类号: G06F17/30

    摘要: Embodiments are provided to generate an integrated data structure. In an embodiment, a database system is configured to generate an integrated database view that includes a number of predicate-based objects and a number of enumerated objects. A declarative membership criteria can be used to provide automatic membership to a group of objects associated with the database system. A number of predicate-based group membership rules can be used when generating a database view that includes a number of predicate-based views and a number of enumerated groups.

    摘要翻译: 提供实施例以生成集成数据结构。 在一个实施例中,数据库系统被配置为生成包括多个基于谓词的对象和多个枚举对象的集成数据库视图。 声明成员资格标准可用于向与数据库系统相关联的一组对象提供自动成员资格。 当生成包含多个基于谓词的视图和许多枚举组的数据库视图时,可以使用多个基于谓词的组成员资格规则。

    State save-on-power-down using GMR non-volatile elements
    117.
    发明授权
    State save-on-power-down using GMR non-volatile elements 有权
    使用GMR非易失性元素的状态保存掉电

    公开(公告)号:US07372723B1

    公开(公告)日:2008-05-13

    申请号:US11464049

    申请日:2006-08-11

    IPC分类号: G11C11/00

    摘要: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. In an embodiment, a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner is provided.

    摘要翻译: 半导体行业旨在通过改进的非易失性存储设备降低传统易失性存储设备的风险。 对于显着提升,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 在一个实施例中,提供了可以与常规的基于半导体的计算,逻辑和存储器装置集成以保持易失性逻辑状态和/或非易失性方式的易失性数字信息的保存在掉电电路。

    Look-up table for use with redundant memory
    118.
    发明授权
    Look-up table for use with redundant memory 有权
    查找表用于冗余内存

    公开(公告)号:US07328379B2

    公开(公告)日:2008-02-05

    申请号:US11067326

    申请日:2005-02-25

    IPC分类号: G11C29/00

    CPC分类号: G11C29/808 G11C29/846

    摘要: A redundancy scheme for a memory is disclosed that is programmable both before and after the memory device is packaged and/or installed in a system. This is preferably accomplished by using programmable non-volatile memory elements to control the replacement circuitry. Because the programmable memory elements are non-volatile, the desired replacement configuration is not lost during shipping, or if power is lost in a system. By allowing post-packaging replacement of defective memory elements, the overall yield of the device may be improved. By allowing post system installation replacement of defective memory elements, the reliability of many systems may be improved. In addition, the disclosed redundancy scheme allows two or more defective memory elements from different rows or columns to be replaced with memory elements from a single redundant low or column. This provides added flexibility during the replacement process.

    摘要翻译: 公开了一种用于存储器的冗余方案,其在存储器件被封装和/或安装在系统中之前和之后是可编程的。 这优选地通过使用可编程非易失性存储器元件来控制替换电路来实现。 由于可编程存储器元件是非易失性的,所以在运输过程中或者系统中的电源丢失时,所需的更换配置不会丢失。 通过允许更换缺陷存储元件的后期封装,可以提高器件的整体产量。 通过允许后置系统安装更换有缺陷的存储器元件,可以提高许多系统的可靠性。 此外,所公开的冗余方案允许来自不同行或列的两个或更多个有缺陷的存储器元件被来自单个冗余行或列的存储器元件替换。 这在更换过程中提供了更多的灵活性。

    Downstream channel change technique implemented in an access network

    公开(公告)号:US20060251097A1

    公开(公告)日:2006-11-09

    申请号:US11484249

    申请日:2006-07-10

    IPC分类号: H04L12/28

    CPC分类号: H04L12/2801 H04N21/242

    摘要: A dynamic channel change technique is disclosed which may be implemented between nodes and a Head End of an access network. Initially a network device may communicate with the Head End via a first downstream channel and a first upstream channel. When the network device receives a dynamic channel change request which includes instructions for the network device to switch to a second downstream channel, the network device may respond by switching from the first downstream channel to the second downstream channel. Thereafter, the network device may communicate with the Head End via the second downstream channel and first upstream channel. Further, according to a specific embodiment, the dynamic channel change request may also include an upstream channel change request for causing the network device to switch from a first upstream channel to a second upstream channel.