公开(公告)号：US11573734B2

公开(公告)日：2023-02-07

申请号：US16732333

申请日：2020-01-01

Applicant: Silicon Motion, Inc.

Inventor： Jian-Dong Du ,  Pi-Ju Tsai ,  Tsung-Chieh Yang

IPC: G06F3/06 ,  G06F11/07

Abstract: The present invention proposes a method for managing a plurality of memory units in a flash memory module. The method includes: creating a programed timestamp corresponding to each first memory unit according to a data-written time of said each first memory unit; selecting a corresponding read-retry table for performing a read operation upon said each first memory unit according to the programed timestamp of said each first memory unit; and performing a first refresh operation according to program timestamps of first memory units that have been written with data.

公开(公告)号：US11567699B2

公开(公告)日：2023-01-31

申请号：US17168153

申请日：2021-02-04

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang

IPC: G06F3/06 ,  G06F12/1081 ,  G06F12/02

Abstract: The present invention provides a memory controller configured to access a plurality of channels, wherein each of the channels includes a plurality flash memory chips, and the memory controller includes a flash translation layer and a plurality of control modules. The flash translation layer is configured to generate commands with corresponding physical addresses of at least one of the channels. The plurality of control modules are connected to the plurality of channels, respectively, and each of the control modules operates independently to receive the corresponding command with the corresponding physical address from the flash translation layer, to access the flash memory chips within the corresponding channels.

公开(公告)号：US11507319B2

公开(公告)日：2022-11-22

申请号：US17167099

申请日：2021-02-04

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang

IPC: G06F3/06 ,  G06F12/02

Abstract: The present invention provides a memory controller configured to access a plurality of channels, wherein each of the channels includes a plurality flash memory chips, and the memory controller includes a flash translation layer and a plurality of control modules. The flash translation layer is configured to generate commands with corresponding physical addresses of at least one of the channels. The plurality of control modules are connected to the plurality of channels, respectively, and each of the control modules operates independently to receive the corresponding command with the corresponding physical address from the flash translation layer, to access the flash memory chips within the corresponding channels.

公开(公告)号：US11386952B2

公开(公告)日：2022-07-12

申请号：US17075689

申请日：2020-10-20

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Hsiao-Te Chang ,  Wen-Long Wang

IPC: G11C11/34 ,  G11C11/56 ,  G11C16/26 ,  G06F3/06 ,  G11C16/08

Abstract: A method for performing memory access of a Flash cell of a Flash memory includes: performing a first sensing operation corresponding to a first sensing voltage to generate a first digital value of the Flash cell; according to a result of the first sensing operation, performing a plurality of second sensing operations to generate a second digital value of the Flash cell representing at least one candidate threshold voltage of the Flash cell; determining the threshold voltage of the memory Flash cell according to the at least one candidate threshold voltage; determining soft information of a bit stored in the Flash cell according to the threshold voltage of the Flash cell; and using the soft information to perform soft decoding.

公开(公告)号：US11366616B2

公开(公告)日：2022-06-21

申请号：US17105511

申请日：2020-11-26

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang

IPC: G06F3/06 ,  G06F11/10

Abstract: A method for performing storage control in a storage server may include: regarding any memory device of a plurality of memory devices installed at the storage server, assigning a channel of multiple channels within the memory device for access control corresponding to a thread of a plurality of threads running on the storage server, wherein the storage server configures the plurality of memory devices to form a RAID of the storage server; and during storing a series of logical access units (LAUs) into the RAID, writing information into respective sets of pages of the plurality of memory devices as pages in a LAU of the series of LAUs according to a predetermined arrangement rule, to make the respective sets of pages be sequentially written into the plurality of memory devices respectively with aid of the assignment of the channel of the multiple channels to the thread. Associated apparatus are provided.

公开(公告)号：US20220182074A1

公开(公告)日：2022-06-09

申请号：US17676853

申请日：2022-02-22

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang ,  Hong-Jung Hsu

IPC: H03M13/09 ,  H03M13/00 ,  G11C16/10 ,  G06F11/10 ,  G11C11/56 ,  H03M13/15

Abstract: A flash memory storage management method includes: providing a flash memory module including single-level-cell (SLC) blocks and at least one multiple-level-cell block such as MLC block, TLC block, or QLC block; classifying data to be programmed into groups of data; respectively executing SLC programing and RAID-like error code encoding to generate corresponding parity check codes, to program the groups of data and corresponding parity check codes to the SLC blocks; when completing program of the SLC blocks, performing an internal copy to program the at least one multiple-level-cell block by sequentially reading and writing the groups of data and corresponding parity check codes from the SLC blocks to the multiple-level-cell block according to a storage order of the SLC blocks.

公开(公告)号：US11354231B2

公开(公告)日：2022-06-07

申请号：US16427293

申请日：2019-05-30

Applicant: Silicon Motion Inc.

Inventor： Tsung-Chieh Yang

IPC: G06F12/02 ,  G11C11/56 ,  G06F3/06 ,  G06F11/10

Abstract: A method for performing access management of a memory device with aid of information arrangement and associated apparatus (e.g. the memory device and controller thereof, and an associated electronic device) are provided. The method may include: when the host device sends a write command to the memory device, utilizing the memory controller to generate a plurality of ECC chunks respectively corresponding to a plurality of sets of memory cells of the NV memory according to data, for establishing one-to-one mapping between the plurality of ECC chunks and the plurality of sets of memory cells; and utilizing the memory controller to store the plurality of ECC chunks into the plurality of sets of memory cells, respectively, to prevent any two ECC chunks of the ECC chunks from sharing a same set of memory cells of the sets of memory cells, to enhance read performance of the memory controller regarding the data.

公开(公告)号：US20210398596A1

公开(公告)日：2021-12-23

申请号：US17461987

申请日：2021-08-30

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang

IPC: G11C16/26 ,  G11C11/56 ,  G11C16/04 ,  G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G11C16/34 ,  H03M13/15

Abstract: A method for reading data stored in a flash memory includes at least the following steps: controlling the flash memory to perform a plurality of read operations upon a plurality of memory cells included in the flash memory; obtaining a plurality of bit sequences read from the memory cells, respectively, wherein the read operations read bits of a predetermined bit order from the memory cells by utilizing different control gate voltage settings; and determining readout information of the memory cells according to binary digit distribution characteristics of the bit sequences.

公开(公告)号：US20210342101A1

公开(公告)日：2021-11-04

申请号：US17376192

申请日：2021-07-15

Applicant: Silicon Motion, Inc.

Inventor： Tsung-Chieh Yang

IPC: G06F3/06 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26

Abstract: The present invention provides an electronic device, wherein the electronic device includes a flash memory module and a flash memory controller. The flash memory module includes at least one flash memory chip, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the flash memory controller is configured to access the flash memory module. In the operations of the electronic device, when the flash memory controller sends a read command to the flash memory module to ask for data on at least one page, the flash memory module uses a plurality of read voltages to read each memory cell of the at least one page to obtain multi-bit information of each memory cell, and the flash memory module transmits the multi-bit information of each memory cell of the at least one page to the flash memory controller.

公开(公告)号：US20210318953A1

公开(公告)日：2021-10-14

申请号：US17355192

申请日：2021-06-23

Applicant: Silicon Motion, Inc.

Inventor： Jian-Dong Du ,  Chia-Jung Hsiao ,  Tsung-Chieh Yang

IPC: G06F12/02 ,  G06F12/0882 ,  G11C11/4093 ,  G11C11/4099 ,  G11C11/4074 ,  G06F13/16

Abstract: The present invention provides a flash memory controller, wherein the flash memory controller is arranged to access a flash memory module, and the flash memory controller includes a ROM, a microprocessor and a timer. The ROM stores a program code, the microprocessor is configured to execute the program code to control the access of the flash memory module, and the timer is used to generate time information. In the operations of the flash memory controller, the microprocessor refers to the time information to perform dummy read operations upon at least a portion of the blocks, wherein the dummy read operations are not triggered by read commands from a host device.