公开(公告)号：USD319228S

公开(公告)日：1991-08-20

申请号：US466827

申请日：1990-01-16

申请人： Seiichi Mori ,  Toshimasa Yamanaka ,  Takeshi Matsushita

设计人： Seiichi Mori ,  Toshimasa Yamanaka ,  Takeshi Matsushita

公开(公告)号：US4990463A

公开(公告)日：1991-02-05

申请号：US373289

申请日：1989-06-29

申请人： Seiichi Mori

发明人： Seiichi Mori

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/318 ,  H01L21/321 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108

CPC分类号： H01L28/40 ,  H01L21/3211 ,  Y10S438/954

摘要： In the invention, the thin natural oxide film formed on a surface of a first polycrystalline silicon layer containing an impurity diffused at a high concentration is transformed into a silicon nitride film by rapid nitriding. When the resultant structure is placed in a low-pressure CVD furnace to deposit a silicon nitride film, no natural oxide film is grown on the polycrystalline silicon layer. Hence, when the invention is applied to manufacture of a capacitor for a memory cell, the inter-layer insulative film of the capacitor is not too thick. As a result, a reliable capacitor suitable for micropatterning of elements can be formed between the first and second polycrystalline silicon layers.

摘要翻译： 在本发明中，通过快速氮化将形成在含有以高浓度扩散的杂质的第一多晶硅层的表面上形成的薄的自然氧化膜转变成氮化硅膜。 当将所得结构放置在低压CVD炉中以沉积氮化硅膜时，在多晶硅层上不生长天然氧化物膜。 因此，当将本发明应用于制造用于存储单元的电容器时，电容器的层间绝缘膜不会太厚。 结果，可以在第一和第二多晶硅层之间形成适用于元件微图形化的可靠电容器。

公开(公告)号：US4935378A

公开(公告)日：1990-06-19

申请号：US170253

申请日：1988-03-18

申请人： Seiichi Mori

发明人： Seiichi Mori

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/768 ,  H01L29/788 ,  H01L29/792

CPC分类号： H01L21/28273

摘要： According to a semiconductor device manufacturing method of the invention, a first polycrystalline silicon layer doped with an impurity, a thin oxide film, a second polycrystalline silicon layer, and a silicon nitride film are sequentially formed, one upon the other. The silicon nitride film, the second polycrystalline silicon layer, the thin oxide film, and the first polycrystalline silicon layer are then etched, in a self-aligned manner, by means of a photolithography process. A thick oxide film is formed on a side wall portion of the first polycrystalline silicon layer, using the silicon nitride film as a mask, and after the silicon nitride film is removed, a conductive film is formed on the entire surface. Since a film formation process advances without patterning the first polycrystalline silicon layer, the first polycrystalline silicon layer is not damaged by an RIE process and the like. A defect density of the oxide film formed on the first polycrystalline silicon layer can be reduced. Since the thick oxide film is formed on the side wall portion of the first polycrystalline silicon layer, a withstand voltage and reliability of this portion are largely improved.

公开(公告)号：US4847667A

公开(公告)日：1989-07-11

申请号：US159963

申请日：1988-02-24

申请人： Seiichi Mori

发明人： Seiichi Mori

IPC分类号： H01L21/3105 ,  H01L21/768

CPC分类号： H01L21/76804 ,  H01L21/3105 ,  H01L21/76819

摘要： In a step of forming an interlayer insulation film between memory elements in an ultraviolet erasable nonvolatile semiconductor memory device and an upper metal wiring layer, a thermal oxide film is formed on a semiconductor substrate and around the stacked gate, and a boron and phosphorus doped oxide film is formed on a phosphorus doped oxide film which is formed on the thermal oxide film. Then, a heat treatment is effected to cause the boron and phosphorus doped oxide film to melt and fill the concave portion on the surface of the phosphorus doped oxide film.

公开(公告)号：US4616402A

公开(公告)日：1986-10-14

申请号：US729660

申请日：1985-05-02

申请人： Seiichi Mori

发明人： Seiichi Mori

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/762 ,  H01L29/788 ,  H01L29/792 ,  H01L21/26

CPC分类号： H01L21/28273 ,  H01L21/762 ,  H01L29/7881 ,  Y10S148/156

摘要： A method of manufacturing a semiconductor device with a stacked-gate-electrode structure which includes; forming source and drain regions in the surface portion of a semiconductor substrate in a spaced-apart relationship, forming a floating gate such that it overlies the channel region between the source and drain regions with a gate insulating film therebetween, and forming a control gate such that it overlies the floating gate with an insulating film therebetween. An oxidation-resistant film pattern having a predetermined opening is formed over a non-monocrystalline silicon layer. The non-monocrystalline silicon layer within the opening is selectively oxidized with the oxidation-resistant film pattern as a mask to form a separation insulating film. In this way, a floating gate layer is formed with the portion of the non-monocrystalline silicon layer insulatingly separated. With the oxidation-resistant film pattern left over the floating gate layer and with the separation insulating film left within the opening, a control gate layer is formed over the surface of the resultant surface to permit the whole surface of the resultant surface to be planarized.

摘要翻译： 一种制造具有堆叠栅电极结构的半导体器件的方法，包括： 在间隔开的关系中在半导体衬底的表面部分中形成源极和漏极区域，形成浮置栅极，使得栅极和漏极区域之间的栅极绝缘膜覆盖在源极和漏极区域之间的沟道区域上，并且形成控制栅极， 它们之间的绝缘膜覆盖着浮动栅极。 在非单晶硅层上形成具有预定开口的抗氧化膜图案。 开口内的非单晶硅层被选择性地用抗氧化膜图案氧化作为掩模以形成分离绝缘膜。 以这种方式，形成浮栅，绝缘分离非单晶硅层的一部分。 通过在浮栅层上留下抗氧化膜图案，并将分离绝缘膜留在开口内，在所得表面的表面上形成控制栅极层，使得所得表面的整个表面平坦化。