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公开(公告)号：US07911869B1
公开(公告)日：2011-03-22
申请号：US11198688
申请日：2005-08-05
摘要： In a programmable circuit making use of fuse cells, a snapback NMOS or NPN transistor or SCR without reversible snapback capability is used as an anti-fuse, and programming comprises biasing the control electrode of the transistor to cause the transistor to go into snapback mode.
摘要翻译： 在使用熔丝单元的可编程电路中，使用不具有可逆快速恢复能力的快速恢复NMOS或NPN晶体管或SCR作为反熔丝，并且编程包括偏置晶体管的控制电极以使晶体管进入快速恢复模式。
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公开(公告)号：US07910950B1
公开(公告)日：2011-03-22
申请号：US11403599
申请日：2006-04-13
IPC分类号： H01L29/66
CPC分类号： H01L27/0266 , H01L29/063 , H01L29/7428 , H01L29/7436 , H01L29/749
摘要： In an LDMOS-SCR ESD protection structure gate voltage of an ESD protection LDSCR is defined by connecting the gate to the source of a reference LDSCR. The reference LDSCR is implemented as a self-triggering device in which the snapback drain-source voltage (avalanche breakdown voltage) is controlled to be lower than that for the major LDSCR by adjusting the RESURF layer-composite overlap for the reference LDSCR to be different to that of the major LDSCR.
摘要翻译： 在LDMOS-SCR ESD保护结构中，通过将栅极连接到参考LDSCR的源极来定义ESD保护LDSCR的栅极电压。 参考LDSCR被实现为自触发装置，其中通过将参考LDSCR的RESURF层 - 复合重叠调整为不同，将回跳式漏极 - 源极电压（雪崩击穿电压）控制为低于主LDSCR的电压 到LDSCR主要的。
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公开(公告)号：US20100295638A1
公开(公告)日：2010-11-25
申请号：US12852743
申请日：2010-08-09
CPC分类号： H02M3/34
摘要： A MEMS magnetic flux switch is fabricated as a ferromagnetic core. The core includes a center cantilever that is fabricated as a free beam that can oscillate at a resonant frequency that is determined by its mechanical and material properties. The center cantilever is moved by impulses applied by an associated motion oscillator, which can be magnetic or electric actuators.
摘要翻译： MEMS磁通开关被制造为铁磁芯。 芯包括中心悬臂，其被制造为可以以其机械和材料性质确定的共振频率振荡的自由梁。 中心悬臂由相关运动振荡器施加的脉冲移动，运动振荡器可以是磁性或电动执行器。
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公开(公告)号：US07794510B1
公开(公告)日：2010-09-14
申请号：US10988297
申请日：2004-11-12
CPC分类号： H01M10/42 , H01M2/361 , H01M10/0472 , H01M10/4257 , Y10T29/49108
摘要： In an on chip battery and method of making an on-chip battery, the electrodes are formed from metal layers deposited as part of the chip fabrication process. An electrolyte is preferably introduced between the electrodes at time of packaging of the chip.
摘要翻译： 在片上电池和制造片上电池的方法中，电极由作为芯片制造工艺的一部分沉积的金属层形成。 在芯片封装时，优选在电极之间引入电解质。
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公开(公告)号：US07514751B2
公开(公告)日：2009-04-07
申请号：US11890097
申请日：2007-08-02
IPC分类号： H01L23/62
CPC分类号： H01L27/0259
摘要： A diode for alternating current (DIAC) electrostatic discharge (ESD) protection circuit is formed in a silicon germanium (SiGe) hetrojunction bipolar transistor (HBT) process that utilizes a very thin collector region. ESD protection for a pair of to-be-protected pads is provided by utilizing the base structures and the emitter structures of the SiGe transistors.
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公开(公告)号：US07057867B1
公开(公告)日：2006-06-06
申请号：US10851516
申请日：2004-05-21
IPC分类号： H02H9/00
CPC分类号： H01L27/0259 , H01L27/0266
摘要： Electrostatic discharge (ESD) protection clamp circuitry including current tunneling circuitry to provide control current for controlling current shunting circuitry for shunting ESD current from the protected signal terminal.
摘要翻译： 静电放电（ESD）保护钳位电路，包括电流隧道电路，以提供控制电流，用于控制电流分流电路，用于从受保护的信号端子分流ESD电流。
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公开(公告)号：US07057215B1
公开(公告)日：2006-06-06
申请号：US10210948
申请日：2002-08-02
IPC分类号： H01L29/74 , H01L31/111
CPC分类号： H01L27/0266 , H01L29/87
摘要： In an ESD protection device making use of a LVTSCR-like structure or an IGBT-like structure, negative polarity over-voltage protection is achieved by providing a LVTSCR-like structure or IGBT-like structure that defines a PMOS device.
摘要翻译： 在使用LVTSCR结构或类IGBT结构的ESD保护器件中，通过提供限定PMOS器件的类似LVTSCR的结构或类IGBT结构来实现负极性过电压保护。
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118.发明授权Stacked high-voltage ESD protection clamp with triggering voltage circuit control 有权堆叠高压ESD保护钳具有触发电压电路控制公开(公告)号：US07027278B1
公开(公告)日：2006-04-11
申请号：US10897063
申请日：2004-07-22
IPC分类号： H02H9/00
CPC分类号： H01L27/0259 , H01L27/0266
摘要： A stacked high-voltage ESD protection clamp is provided that realizes the desired triggering characteristics of a BJT or BSCR stacked snapback clamp. The operational principle of the new circuit is based upon introduction of a middle node capacitor into the stacked (cascoded) clamp. The capacitor (or driver) provides conditions for a two-stage turn-on. At the beginning of an ESD pulse, the capacitor is discharged. With the ESD voltage increase, part of the current is used to charge the capacitor, thus shunting one of the BJTs (BSCRs). As a result, the other BJT (BSCR) will experience fast turn-on. After turn-on, the current provides a fast charge of the capacitor and the turn-on of the second device. Thus, the middle node capacitor allows the triggering characteristics of the clamp to be controlled.
摘要翻译： 提供堆叠的高压ESD保护钳，实现BJT或BSCR堆叠式快速恢复钳的所需触发特性。 新电路的工作原理是基于将中间节点电容器引入堆叠（共编）钳位。 电容器（或驱动器）为两级开启提供条件。 在ESD脉冲开始时，电容放电。 随着ESD电压的增加，部分电流用于对电容器充电，从而分流BJT（BSCR）之一。 因此，其他BJT（BSCR）将会快速开启。 导通后，电流提供电容器的快速充电和第二个器件的导通。 因此，中间节点电容器允许控制夹具的触发特性。
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公开(公告)号：US06985386B1
公开(公告)日：2006-01-10
申请号：US10895713
申请日：2004-07-08
IPC分类号： G11C16/04
CPC分类号： G11C16/0416 , G11C2216/10 , H01L27/115 , H01L27/11521 , H01L27/11558
摘要： A method of programming a nonvolatile memory cell in which a ramped control voltage is used to obtain the desired voltage on the storage node.
摘要翻译： 一种非易失性存储单元的编程方法，其中使用斜坡控制电压来获得存储节点上的期望电压。
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120.发明授权Method of erasing an EEPROM cell utilizing a frequency/time domain based erased signal 有权使用基于频率/时域的擦除信号擦除EEPROM单元的方法公开(公告)号：US06947331B1
公开(公告)日：2005-09-20
申请号：US10665187
申请日：2003-09-17
CPC分类号： G11C16/14
摘要： A method is provided for erasing a nonvolatile memory cell that includes a source region, a drain region, a floating gate electrode and a control gate electrode to which an erase signal is applied. In accordance with the method, a source bias voltage is applied to the source region, a drain bias voltage is applied to the drain region, and a frequency/time domain based voltage signal is applied to the control gate electrode of the cell as the erase signal.
摘要翻译： 提供一种用于擦除包括源区域，漏区，浮栅电极和施加擦除信号的控制栅电极的非易失性存储单元的方法。 根据该方法，将源偏置电压施加到源极区域，将漏极偏置电压施加到漏极区域，并且基于频率/时域的电压信号施加到电池的控制栅极电极作为擦除 信号。
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