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    Ultra low leakage MOSFET transistor
    2.
    发明授权
    Ultra low leakage MOSFET transistor 有权
    超低漏电MOSFET晶体管

    公开(公告)号：US07202538B1

    公开(公告)日：2007-04-10

    申请号：US10647604

    申请日：2003-08-25

    申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

    发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

    IPC分类号： H01L29/94

    CPC分类号： H01L29/4238 ,  H01L21/28123 ,  H01L21/823481 ,  H01L21/823878 ,  H01L29/0692

    摘要： A MOSFET transistor structure is formed in a substrate of semiconductor material having a first conductivity type. The MOSFET transistor structure includes an active region that is surrounded by a perimeter isolation dielectric material formed in the substrate to define a continuous sidewall interface between the sidewall dielectric material and the active region. Spaced-apart source and drain regions are formed in the active region and are also spaced-apart from the sidewall interface. A conductive gate electrode that is separated from the substrate channel region by intervening gate dielectric material includes a first portion that extends over the substrate channel region and a second portion that extends continuously over the entire sidewall interface between the isolation dielectric material and the active region. Thus, an enclosed ring is maintained around the entire composite perimeter, thereby completely avoiding regions of high trap density and, thus, preventing any current path for gate induced drain leakage (GIDL) to occur.

    摘要翻译： 在具有第一导电类型的半导体材料的衬底中形成MOSFET晶体管结构。 MOSFET晶体管结构包括由形成在衬底中的周边隔离电介质材料围绕以限定侧壁电介质材料和有源区域之间的连续侧壁界面的有源区域。 间隔开的源极和漏极区域形成在有源区中并且也与侧壁界面间隔开。 通过介入栅极电介质材料与衬底沟道区分离的导电栅电极包括在衬底沟道区上延伸的第一部分和在隔离电介质材料与有源区之间的整个侧壁界面上连续延伸的第二部分。 因此，围绕整个复合材料周边保持封闭的环，从而完全避免高陷阱密度的区域，并因此防止发生栅极引起漏极泄漏（GIDL）的任何电流路径。

    Integrated trim structure utilizing dynamic doping
    3.
    发明授权
    Integrated trim structure utilizing dynamic doping 有权
    采用动态掺杂的集成微调结构

    公开(公告)号：US06940133B1

    公开(公告)日：2005-09-06

    申请号：US10818039

    申请日：2004-04-05

    申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

    发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

    IPC分类号： H01C17/26 ,  H01L21/02 ,  H01L29/76 ,  H01L29/8605 ,  H01L29/94

    CPC分类号： H01L28/20 ,  H01C17/267 ,  H01L29/8605

    摘要： An integrated circuit trim structure includes a dopant source, a target trim element formed in proximity to the dopant source, and a conductive heating element. The heater element is formed in proximity to the dopant source and includes first and second terminals and a trapezoid shaped region formed between the first and second terminals. As predefined current pulse is applied to the first terminal to promote current flow between the first and second terminals, a local heat source is created at a predefined location within the trapezoid shaped region and in proximity to the dopant source such that dopant flows from the dopant source into the target trim element to change the conductive characteristics of the target trim element.

    摘要翻译： 集成电路微调结构包括掺杂剂源，在掺杂剂源附近形成的目标微调元件和导电加热元件。 加热器元件形成在掺杂剂源附近，并且包括形成在第一和第二端子之间的第一和第二端子和梯形区域。 当预定义的电流脉冲施加到第一端子以促进第一和第二端子之间的电流流动时，在梯形区域内的预定位置处并且在掺杂剂源附近产生局部热源，使得掺杂剂从掺杂剂 源到目标装饰元件以改变目标装饰元件的导电特性。

    Imaging cell that has a long integration period and method of operating the imaging cell
    4.
    发明授权
    Imaging cell that has a long integration period and method of operating the imaging cell 有权
    成像细胞具有长的积分期和操作成像细胞的方法

    公开(公告)号：US07218555B2

    公开(公告)日：2007-05-15

    申请号：US11242094

    申请日：2005-10-03

    申请人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

    发明人： Peter J. Hopper ,  Philipp Lindorfer ,  Vladislav Vashchenko ,  Robert Drury

    IPC分类号： G11C11/34 ,  H01L29/788

    CPC分类号： H01L27/11526 ,  H01L27/115 ,  H01L27/11531 ,  H01L27/14603 ,  H01L27/14609

    摘要： The integration period of an imaging cell, or the time that an imaging cell is exposed to light energy, is substantially increased by utilizing a single-poly, electrically-programmable, read-only-memory (EPROM) structure to capture the light energy. Photogenerated electrons are formed in the channel region of the EPROM structure from the light energy. The photogenerated electrons are then accelerated into having ionizing collisions which, in turn, leads to electrons being injected onto the floating gate of the EPROM structure at a rate that is proportionate to the number of photons captured by the channel region.

    摘要翻译： 成像单元的积分周期或成像单元暴露于光能的时间通过利用单聚电子可编程只读存储器（EPROM）结构捕获光能而大大增加。 光能从EPROM结构的沟道区形成光电子。 光生成的电子然后被加速成具有电离碰撞，其进而导致电子以与通道区域捕获的光子数成正比的速率注入到EPROM结构的浮动栅极上。