公开(公告)号：US08022051B2

公开(公告)日：2011-09-20

申请号：US11665868

申请日：2005-10-20

Applicant: Sang-June Nam ,  So-Young Chung ,  Jeong-Jun Han ,  Wang-Keun Choi ,  Chang-Seo Park ,  Yun-Sik Kim ,  Sang-Woo Cho ,  Young-Ho Lee ,  Jin-Wook Kim ,  Ui-Chan Koh

Inventor： Sang-June Nam ,  So-Young Chung ,  Jeong-Jun Han ,  Wang-Keun Choi ,  Chang-Seo Park ,  Yun-Sik Kim ,  Sang-Woo Cho ,  Young-Ho Lee ,  Jin-Wook Kim ,  Ui-Chan Koh

IPC: A61K31/685 ,  A61P17/00 ,  A61P17/16

CPC classification number: A61K31/685

Abstract: Disclosed is a composition containing phosphatidylserine as an effective ingredient, and more particularly to a composition containing phosphatidylserine as an effective ingredient for protecting and improving a skin, reinforcing a skin barrier function, suppressing and alleviating an inflammatory response, treating and improving an atopic skin, activating PPAR-a promoting a differentiation of the skin, protecting the skin and preventing and improving skin aging and wrinkle. Accordingly, it is possible to protect and improve the skin from the injury due to the ultraviolet or the external stimulating material such as chemical material and to reinforce and strengthen the skin barrier function using the composition, thereby improving a general skin state.

Abstract translation: 公开了含有磷脂酰丝氨酸作为有效成分的组合物，更具体地，涉及含有磷脂酰丝氨酸作为保护和改善皮肤，增强皮肤屏障功能，抑制和减轻炎症反应，治疗和改善特应性皮肤的有效成分的组合物， 激活PPAR-a促进皮肤分化，保护皮肤，预防和改善皮肤老化和皱纹。 因此，可以保护和改善由于紫外线或外部刺激材料如化学材料造成的伤害的皮肤，并且可以使用该组合物增强和增强皮肤屏障功能，从而改善一般的皮肤状态。

公开(公告)号：US20110212591A1

公开(公告)日：2011-09-01

申请号：US12964562

申请日：2010-12-09

Applicant: Jae-Geun OH ,  Young-Ho Lee ,  Jin-Ku Lee ,  Mi-Ri Lee

Inventor： Jae-Geun OH ,  Young-Ho Lee ,  Jin-Ku Lee ,  Mi-Ri Lee

IPC: H01L21/336 ,  H01L21/265

CPC classification number: H01L21/324 ,  H01L21/26513 ,  H01L21/268 ,  H01L21/2686 ,  H01L21/28061 ,  H01L29/66575

Abstract: A method for fabricating a transistor of a semiconductor device includes: forming a gate pattern over a substrate; forming a junction region by performing an on implantation process onto the substrate at opposite sides of the gate pattern; performing a solid phase epitaxial (SPE) process on the junction region at a temperature approximately ranging from 770° C. to 850° C.; and performing a rapid thermal annealing (RTA) process on the junction region.

Abstract translation: 一种制造半导体器件的晶体管的方法包括：在衬底上形成栅极图案; 通过在所述栅极图案的相对侧上对所述衬底进行注入工艺来形成结区域; 在大约770℃至850℃的温度下在接合区域进行固相外延（SPE）工艺; 并在接合区域上进行快速热退火（RTA）处理。

公开(公告)号：US20110189843A1

公开(公告)日：2011-08-04

申请号：US12774311

申请日：2010-05-05

Applicant: Jin-Ku Lee ,  Jae-Geun Oh ,  Young-Ho Lee ,  Mi-Ri Lee ,  Seung-Beom Baek

Inventor： Jin-Ku Lee ,  Jae-Geun Oh ,  Young-Ho Lee ,  Mi-Ri Lee ,  Seung-Beom Baek

IPC: H01L21/306

CPC classification number: H01L29/66575 ,  H01L21/306

Abstract: A doping method that forms a doped region at a desired location of a three-dimensional (3D) conductive structure, controls the doping depth and doping dose of the doped region relatively easily, has a shallow doping depth, and prevents a floating body effect. A semiconductor device is fabricated using the same doping method. The method includes, forming a conductive structure having a sidewall, exposing a portion of the sidewall of the conductive structure, and forming a doped region in the exposed portion of the sidewall by performing a plasma doping process.

Abstract translation: 在三维（3D）导电结构的期望位置处形成掺杂区域的掺杂方法相对容易地控制掺杂深度和掺杂区域的掺杂剂量，具有浅掺杂深度，并且防止浮体效应。 使用相同的掺杂方法制造半导体器件。 该方法包括：形成具有侧壁的导电结构，暴露导电结构的侧壁的一部分，以及通过执行等离子体掺杂工艺在侧壁的暴露部分中形成掺杂区域。

公开(公告)号：US20110136340A1

公开(公告)日：2011-06-09

申请号：US12904363

申请日：2010-10-14

Applicant: Jae-Hwang Sim ,  Yoon-Moon PARK ,  Keon-Soo KIM ,  Min-Sung SONG ,  Young-Ho LEE

Inventor： Jae-Hwang Sim ,  Yoon-Moon PARK ,  Keon-Soo KIM ,  Min-Sung SONG ,  Young-Ho LEE

IPC: H01L21/3213 ,  H01L21/308

CPC classification number: H01L21/32139 ,  H01L21/0337 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11529 ,  Y10S438/947

Abstract: A method of fabricating a semiconductor device facilitates the forming of a conductive pattern of features having different widths. A conductive layer is formed on a substrate, and a mask layer is formed on the conductive layer. First spaced apart patterns are formed on the mask layer and a second pattern including first and second parallel portion is formed beside the first patterns on the mask layer. First auxiliary masks are formed over ends of the first patterns, respectively, and a second auxiliary mask is formed over the second pattern as spanning the first and second portions of the second pattern. The mask layer is then etched to form first mask patterns below the first patterns and a second mask pattern below the second pattern. The first and second patterns and the first and second auxiliary masks are removed. The conductive layer is then etched using the first and second mask patterns as an etch mask.

Abstract translation: 制造半导体器件的方法有助于形成具有不同宽度的特征的导电图案。 在基板上形成导电层，在导电层上形成掩模层。 在掩模层上形成第一间隔开的图案，并且在掩模层上的第一图案旁边形成包括第一和第二平行部分的第二图案。 第一辅助掩模分别形成在第一图案的端部上，并且第二辅助掩模形成在第二图案上，跨越第二图案的第一和第二部分。 然后蚀刻掩模层以在第一图案下方形成第一掩模图案，并在第二图案下方形成第二掩模图案。 去除第一和第二图案以及第一和第二辅助掩模。 然后使用第一和第二掩模图案作为蚀刻掩模蚀刻导电层。

公开(公告)号：US20110064184A1

公开(公告)日：2011-03-17

申请号：US12557939

申请日：2009-09-11

Applicant: Young Ho Lee ,  Kang Hee Lee ,  Jae Yong Kim ,  Kyung Ho Yoon ,  Hyung Kyu Kim ,  Chang Hwan Shin ,  Dong Seok Oh ,  Wang Ki In ,  Tae Hyun Chun ,  Kun Woo Song

Inventor： Young Ho Lee ,  Kang Hee Lee ,  Jae Yong Kim ,  Kyung Ho Yoon ,  Hyung Kyu Kim ,  Chang Hwan Shin ,  Dong Seok Oh ,  Wang Ki In ,  Tae Hyun Chun ,  Kun Woo Song

IPC: G21C3/34

CPC classification number: G21C3/352 ,  G21C3/356 ,  Y02E30/40

Abstract: A spacer grid for nuclear fuel rods includes a plurality of unit spacer grids stacked one on top of another. Each unit spacer grid includes a plurality of unit spacer grid straps disposed at regular intervals in a row, and a plurality of fixing grid straps connected to respective opposite ends of the unit spacer grid straps so as to fix the unit spacer grid straps. Each unit spacer grid strap has convexities alternating with each other on opposite sides thereof at regular intervals, and at least one of the convexities has a diameter greater than the others. The unit spacer grids are rotated in one direction by a 90 or 180 degree angle when being stacked.

Abstract translation: 用于核燃料棒的间隔栅格包括多个堆叠在另一个顶部上的单元间隔栅格。 每个单元间隔栅格包括以规则的间隔布置成一排的多个单元隔离栅格带，以及连接到单元间隔栅格带的相应相对端的多个固定网格带，以固定单元间隔网格带。 每个单元间隔网格带在其相对侧上以规则的间隔彼此交替的凸起，并且至少一个凸起的直径大于其他直径。 当堆叠时，单元间隔栅格在一个方向上旋转90或180度。

公开(公告)号：US07733420B2

公开(公告)日：2010-06-08

申请号：US11294505

申请日：2005-12-06

Applicant: Haeng-kang Kim ,  Young-ho Lee

Inventor： Haeng-kang Kim ,  Young-ho Lee

IPC: H04N7/01 ,  H04N5/21

CPC classification number: H04N7/012 ,  H04N7/0115 ,  Y10S348/91

Abstract: A judder detection apparatus, a de-interlacing apparatus using the judder detection apparatus, and a de-interlacing method. The judder detection apparatus includes a judder detector to detect whether a detected pattern that is similar to a judder pattern occurs using predetermined pixel values of even and odd fields sequentially input, a pattern detector to detect whether an input image has a uniform pixel value in every other line of the even and odd fields and whether consecutive lines of the even and odd fields have a blind pattern having a difference from the uniform pixel that is greater than or equal to a threshold value, and a determiner to determine whether the detected pattern that is similar to the judder pattern is a judder based on whether the blind pattern is detected.

Abstract translation: 抖动检测装置，使用抖动检测装置的去隔行装置以及去隔行扫描方法。 抖动检测装置包括抖动检测器，用于检测是否使用顺序输入的偶数和奇数场的预定像素值来发生类似于抖动图案的检测图案;模式检测器，用于检测输入图像是否具有每个 奇数场和奇数场的另一行以及偶数和奇数场的连续行是否具有与大于或等于阈值的均匀像素不同的盲模式;以及确定器，用于确定检测到的图案是否 类似于抖动模式是基于是否检测到盲模式的抖动。

公开(公告)号：US07725016B2

公开(公告)日：2010-05-25

申请号：US11590916

申请日：2006-11-01

Applicant: Young Ho Lee ,  Jae Young Bae ,  Sung Chan Kim ,  Jin Hyuck Yang ,  Ha Yong Jung

Inventor： Young Ho Lee ,  Jae Young Bae ,  Sung Chan Kim ,  Jin Hyuck Yang ,  Ha Yong Jung

IPC: G03B17/00

CPC classification number: G02B3/14 ,  G02B13/0025 ,  G02B13/003 ,  G02B13/0035 ,  G02B13/006 ,  G02B13/0075 ,  G02B13/009 ,  G02B26/005 ,  G03B13/36

Abstract: Disclosed herein is a liquid zoom lens. The liquid zoom lens comprises a cylindrical body including glass lenses respectively coupled at upper and lower openings to the body, an auto-focus lens part including a first liquid insulating layer and a first electrolyte layer stacked at a lower portion of the body to form an interface therebetween, and an optical zoom lens part including a second liquid insulating layer and a second electrolyte layer stacked on the first electrolyte layer to form an interface therebetween and a lens positioned in the second liquid insulating layer and fixed to the body with an outer peripheral surface of the lens closely contacting an inner peripheral surface of the body. The liquid zoom lens enables an auto-focus function and an optical zoom function to be performed simultaneously by means of a single liquid lens having a variable curvature.

Abstract translation: 本文公开了一种液体变焦透镜。 液体变焦透镜包括：圆柱体，包括分别在主体上部和下部开口连接的玻璃透镜;自动对焦透镜部分，包括第一液体绝缘层和堆叠在主体下部的第一电解质层， 界面，以及光学变焦透镜部分，包括层叠在第一电解质层上的第二液体绝缘层和第二电解质层，以在其间形成界面，以及位于第二液体绝缘层中并且具有外周边 透镜的表面紧密接触身体的内周表面。 液体变焦透镜能够通过具有可变曲率的单个液体透镜同时执行自动聚焦功能和光学变焦功能。

公开(公告)号：US07687355B2

公开(公告)日：2010-03-30

申请号：US11965835

申请日：2007-12-28

Applicant: Dong Sun Sheen ,  Seok Pyo Song ,  Young Ho Lee

Inventor： Dong Sun Sheen ,  Seok Pyo Song ,  Young Ho Lee

IPC: H01L21/336

CPC classification number: H01L29/66795 ,  H01L29/7851

Abstract: A method for manufacturing a fin transistor includes forming a trench by etching a semiconductor substrate. A flowable insulation layer is filled in the trench to form a field insulation layer defining an active region. The portion of the flowable insulation layer coming into contact with a gate forming region is etched so as to protrude the gate forming region in the active region. A protective layer over the semiconductor substrate is formed to fill the portion of the etched flowable insulation layer. The portion of the protective layer formed over the active region is removed to expose the active region of the semiconductor substrate. The exposed active region of the semiconductor substrate is cleaned. The protective layer remaining on the portion of the etched flowable insulation layer is removed. Gates are formed over the protruded gate forming regions in the active region.

Abstract translation: 一种制造鳍式晶体管的方法包括：通过蚀刻半导体衬底形成沟槽。 可流动的绝缘层填充在沟槽中以形成限定有源区的场绝缘层。 与栅极形成区域接触的可流动绝缘层的部分被蚀刻以便在有源区域中突出栅极形成区域。 形成半导体衬底上方的保护层以填充该可蚀刻的可流动绝缘层的部分。 在有源区上形成的保护层的部分被去除以暴露半导体衬底的有源区。 清洁半导体衬底的暴露的有源区。 残留在可蚀刻的可流动绝缘层的部分上的保护层被去除。 在活性区域中的突出的栅极形成区域上形成栅极。

公开(公告)号：US20100013097A1

公开(公告)日：2010-01-21

申请号：US12566181

申请日：2009-09-24

Applicant: Young-Ho LEE

Inventor： Young-Ho LEE

IPC: H01L23/535

CPC classification number: H01L21/76897 ,  H01L21/02063 ,  H01L21/28525 ,  H01L21/76877

Abstract: Disclosed are a contact plug of a semiconductor device and a method for fabricating the same. The semiconductor device includes: an epitaxial stack formed by inserting a heteroepitaxy layer between a pair of homoepitaxy layers; and a contact plug including a metal layer on the epitaxial stack. Accordingly, in accordance with the present invention, the contact plug is selectively doped in a high concentration, thereby reducing a contact resistance. Furthermore, the present invention also provides an effect of reducing degradation in a device property without decreasing yields of products by minimizing a thermal budget through using a SEG-silicon germanium layer capable of obtaining a high doping concentration and a high deposition speed.

Abstract translation: 公开了半导体器件的接触插头及其制造方法。 半导体器件包括：通过在一对同质外延层之间插入异质外延层而形成的外延堆叠; 以及包括外延层上的金属层的接触插塞。 因此，根据本发明，以高浓度选择性地掺杂接触插塞，从而降低接触电阻。 此外，本发明还提供了通过使用能够获得高掺杂浓度和高沉积速度的SEG硅锗层，通过最小化热预算来降低器件特性降低而不降低产品产量的效果。

公开(公告)号：US20100007972A1

公开(公告)日：2010-01-14

申请号：US12314268

申请日：2008-12-05

Applicant: Young Ho Lee ,  Ju Sung Park ,  Young Kyu Park

Inventor： Young Ho Lee ,  Ju Sung Park ,  Young Kyu Park

IPC: G02B7/02

CPC classification number: G02B7/023 ,  G02B7/022

Abstract: A lens assembly of a camera module mounted in a small portable device includes a body receiving at least one lens and having a hole at one side, a screw member inserted in the hole in a direction substantially parallel to an optical axis, a support boss provided at the other side of the body and including a coupling hole formed in a direction substantially parallel to the optical axis, and a guide groove formed at one side of a side surface of the support boss, a shaft coupled with the coupling hole of the support boss and guiding a movement of the body, and a guide member having one side elastically and tightly attached to the screw member and moved by rotation of the screw member, and the other side coupled with the shaft to be movable along the guide groove and moving the body along the optical axis.