中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

169 records (took 0.016 seconds)

    Network element for use in synchronous digital communications system and central clock generator
    121.
    发明授权
    Network element for use in synchronous digital communications system and central clock generator 失效
    用于同步数字通信系统和中央时钟发生器的网络元件

    公开(公告)号：US6163551A

    公开(公告)日：2000-12-19

    申请号：US994529

    申请日：1997-12-19

    Applicant: Michael Wolf

    Inventor： Michael Wolf

    IPC: H04J3/06 ,  H04L7/00 ,  H04Q11/04

    CPC classification number: H04J3/0647 ,  H04J3/0688 ,  H04J2203/0042 ,  H04J2203/006

    Abstract: The network elements NE1, . . . , NE6 of a synchronous digital communications system must be synchronized with each other without the possibility of clock loops occurring. A network node NODE contains network elements NE1, . . . , NE6 and a central clock generator SASE. The network elements transmit clock signals 2M to the clock generator, which contain a clock of a message signal STM-N and a quality indicator (SSM) contained in the message signal which reflects the accuracy of the clock. The clock generator selects one of the clock signals 2M as the reference clock REF and informs the control installation STE which of the clock signals it has selected and the degree of accuracy of this clock signal. On the basis of this message STAT the control installation gives instructions ANW to the network elements with respect to the quality indicator which the network elements are to transmit to their outputs.

    Abstract translation: 网元NE1，。 。 。 ，同步数字通信系统的NE6必须彼此同步，而不会发生时钟环路。 网络节点NODE包含网元NE1，。 。 。 ，NE6和中央时钟发生器SASE。 网络元件将时钟信号2M发送到时钟发生器，其包含消息信号STM-N的时钟和消息信号中包含的反映时钟精度的质量指示符（SSM）。 时钟发生器选择一个时钟信号2M作为参考时钟REF，并通知控制装置STE它选择了哪个时钟信号以及该时钟信号的精度。 在此消息STAT的基础上，控制设备向网络元件提供关于网络元件要向其输出传输的质量指示符的指令ANW。

    Method of testing clock paths and network elements for carrying out the method
    122.
    发明授权
    Method of testing clock paths and network elements for carrying out the method 失效
    测试时钟路径和网络元素进行方法的方法

    公开(公告)号：US6081550A

    公开(公告)日：2000-06-27

    申请号：US23860

    申请日：1998-02-13

    Applicant: Michael Wolf

    Inventor： Michael Wolf

    IPC: H04J3/06 ,  H04J7/00 ,  H04J9/00 ,  H04L1/24 ,  H04L7/00 ,  H04L27/20 ,  H04L27/233 ,  H04Q11/04 ,  H04B3/46

    CPC classification number: H04J3/0647 ,  H04J7/00 ,  H04J9/00 ,  H04L1/242 ,  H04L27/2035 ,  H04L27/2334 ,  H04L7/0008 ,  H04J2203/006 ,  H04J2203/0062

    Abstract: The indicated test method makes it possible to test clock paths via which a reference clock is transmitted to synchronize network elements in a synchronous digital telecommunications system. To that end the reference clock is marked at the start of the clock path being tested by modulating information thereon. It is observed at the end of the clock path being tested whether the reference clock contains the information modulated thereon at the start. This information is configured so that it does not impair the operation of the synchronous digital telecommunications system. A network element is furthermore indicated, which is in a position to produce by itself the phase modulation required for a test, through its clock generator.

    Abstract translation: 所指示的测试方法使得可以测试发送参考时钟的时钟路径以同步同步数字电信系统中的网络元件。 为此，参考时钟在通过调制信息测试的时钟路径的开始处被标记。 在时钟路径结束时观察到，参考时钟是否包含在开始时调制的信息。 该信息被配置为不损害同步数字电信系统的操作。 此外，还指出了网络元件，其通过其时钟发生器处于能够自身产生测试所需的相位调制的位置。

    Synchronization monitoring in a network element
    123.
    发明授权
    Synchronization monitoring in a network element 失效
    网元中的同步监控

    公开(公告)号：US5917870A

    公开(公告)日：1999-06-29

    申请号：US560073

    申请日：1995-11-17

    Applicant: Michael Wolf

    Inventor： Michael Wolf

    IPC: H04J3/06 ,  H04Q11/04 ,  H04L7/00

    CPC classification number: H04J3/0691 ,  H04J3/0688 ,  H04J2203/006 ,  H04J2203/0089

    Abstract: In digital transmission systems, such as synchronous transmission systems according to the SDH/SONET standard, there is a need to have information on the synchronization status of the system. A known approach is to monitor the pointer activity. This is disadvantageous in that because of a hysteresis in the pointer processor, information derived from the pointer activity only conditionally reflects the synchronization status. In a network element (1) according to the invention which forms part of a transmission system of the above type, at least one interface unit (2, 3, 4) contains, besides an optical-to-electrical transducer (5), a synchronization-monitoring device (6) which derives a synchronization status parameter, e.g., TIE, RMSTIE, by comparing an external clock frequency (T.sub.e) with an internal clock frequency (T.sub.i). For this, the synchronization-monitoring device (6) comprises a phase-comparing device (37), a memory device (25), and an evaluating device (26).

    Abstract translation: 在诸如根据SDH / SONET标准的同步传输系统的数字传输系统中，需要有关于系统的同步状态的信息。 一种已知的方法是监视指针活动。 这是不利的，因为由于指针处理器中的滞后，从指针活动导出的信息仅有条件地反映了同步状态。 在构成上述类型的传输系统的一部分的根据本发明的网络元件（1）中，至少一个接口单元（2,3,4）除了光电换能器（5）之外还包含一个 通过将外部时钟频率（Te）与内部时钟频率（Ti）进行比较来得出同步状态参数（例如TIE，RMSTIE）的同步监视装置（6）。 为此，同步监视装置（6）包括相位比较装置（37），存储装置（25）和评估装置（26）。

    Facility and method for transmitting digitized signals
    124.
    发明授权
    Facility and method for transmitting digitized signals 失效
    用于传输数字化信号的设备和方法

    公开(公告)号：US5835031A

    公开(公告)日：1998-11-10

    申请号：US683100

    申请日：1996-07-16

    Applicant: Michael Wolf

    Inventor： Michael Wolf

    IPC: H04J3/07 ,  H04L25/05 ,  H03M7/100

    CPC classification number: H04L25/05 ,  H04J3/076

    Abstract: When digitized signals are transmitted from a digital transmission system (NET1), e.g. a PDH system, to another digital transmission system (NET2), e.g. a SDH system, which operate at different clock rates (f.sub.1, f.sub.2), the clock rate must be adapted during the transition. To that end, the digitized signals are converted into discrete-time and value-discrete signals in a decoding unit (D1) at the clock rate (f.sub.1) of the one digital transmission system (NET1). A conversion unit (UE1) converts the discrete-time and value-discrete signals into further discrete-time and value-discrete signals, whose pulse repetition rate is adapted to a clock rate derived from the clock rate (f.sub.2) of the other digital transmission system (NET2). This is achieved e.g. with a low-pass filter (FIL1) and a sample-and-hold device (AH1). An encoding unit (K1) converts the further discrete-time and value-discrete signals into digital signals, whose bit rate is adapted to the clock rate (f.sub.2) of the other digital transmission system (NET2), which allows the digital signals to be transmitted in the other digital transmission system (NET2).

    Abstract translation: 当从数字传输系统（NET1）发送数字化信号时，例如， PDH系统，到另一个数字传输系统（NET2），例如 一个SDH系统以不同的时钟速率（f1，f2）工作，在转换过程中必须调整时钟速率。 为此，数字信号以一个数字传输系统（NET1）的时钟速率（f1）在解码单元（D1）中被转换为离散时间和值离散信号。 转换单元（UE1）将离散时间和值离散信号转换成更多的离散时间和值离散信号，其脉冲重复率适应于从其他数字传输的时钟速率（f2）导出的时钟速率 系统（NET2）。 这是实现的。 具有低通滤波器（FIL1）和采样保持装置（AH1）。 编码单元（K1）将进一步的离散时间和值离散信号转换成数字信号，其比特率适应于另一个数字传输系统（NET2）的时钟速率（f2），这允许数字信号为 在另一个数字传输系统（NET2）中传输。

    Control circuit for a solenoid valve
    126.
    发明授权
    Control circuit for a solenoid valve 失效
    电磁阀控制电路

    公开(公告)号：US5645097A

    公开(公告)日：1997-07-08

    申请号：US325227

    申请日：1994-10-21

    Applicant: Jurgen Zechmann ,  Berend-Wilhelm Doden ,  Michael Wolf ,  Helmut Wiss

    Inventor： Jurgen Zechmann ,  Berend-Wilhelm Doden ,  Michael Wolf ,  Helmut Wiss

    IPC: F16K31/06 ,  B60T8/36 ,  H01F7/18

    CPC classification number: H01F7/18 ,  B60T8/36 ,  Y10T137/0318

    Abstract: A solenoid valve control circuit for controlling an actuation current of a solenoid valve when the valve is to be adjusted from its flow-permitting position into its closed position so that the actuation current is initially adjusted to a value beyond the current value at which the valve begins to drop out. However, the actuation current is subsequently adjusted back to the range which lies between the current value at which the valve goes into the closed position and the current value at which the valve goes into its flow-permitting position.

    Abstract translation: PCT No.PCT / DE94 / 00124 Sec。 371日期：1994年10月21日 102（e）日期1994年10月21日PCT 1994年2月8日PCT PCT。 第WO94 / 19810号公报 日期1994年9月1日一个电磁阀控制电路，用于控制电磁阀的动作电流，当阀门要从其流动允许位置调整到其关闭位置时，使得致动电流最初被调整到超过电流值 阀门开始脱落的值。 然而，致动电流随后被调整回到位于阀进入关闭位置的当前值和阀进入其允许流动位置的当前值之间的范围。

    Sheet-like finishing element
    128.
    发明授权
    Sheet-like finishing element 有权
    片状整理元件

    公开(公告)号：US09103115B2

    公开(公告)日：2015-08-11

    申请号：US13992352

    申请日：2011-12-07

    Applicant: Richard Wolf ,  Michael Wolf

    Inventor： Richard Wolf ,  Michael Wolf

    IPC: E04B1/84 ,  E04B1/86 ,  E04B1/90 ,  E04C2/34 ,  E04F15/20 ,  B32B3/12 ,  E04B1/82 ,  E04B1/74

    CPC classification number: E04B1/8409 ,  B32B3/12 ,  B32B2307/102 ,  B32B2307/304 ,  B32B2607/00 ,  B32B2607/02 ,  E04B1/90 ,  E04B2001/747 ,  E04C2/3405 ,  E04C2002/345 ,  E04C2002/3466 ,  E04F15/203

    Abstract: A panel-like/sheet-like finishing element (11) for covering floors and walls, for example in the renovation of old buildings, is provided with heat-insulating and sound-absorbing properties if its interior (15) is provided, between outer covering layers (12, 13), with channel-forming undulating supporting structures (16) filled with high-density coarse granules (21). The supporting structures (16) are connected to the covering layers (12, 13) along the vertex lines (17) so as to provide wet-strength action, and the interior (15), between these covering layers, is sealed by enclosing edging strips (19) to provide wet-strength action, with the simultaneous inclusion of moisture-tight, but vapour-permeable, supporting layers (20) on covering layers (12, 13). If this finishing element (11) is mounted vertically, the granule-filled channels (14) run horizontally.

    Abstract translation: 例如在旧建筑物的翻新中，用于覆盖地板和墙壁的板状/片状整理元件（11）如果在内部（15）之间设置有绝热和吸声性能 覆盖层（12,13），其中填充有高密度粗颗粒（21）的通道形成波状支撑结构（16）。 支撑结构（16）沿着顶点线（17）连接到覆盖层（12,13）以提供湿强度作用，并且在这些覆盖层之间的内部（15）通过包围边缘 条带（19）以提供湿强度作用，同时在覆盖层（12,13）上包含防潮透气的支撑层（20）。 如果该精加工元件（11）垂直安装，则颗粒填充通道（14）水平延伸。

    Apparatus for the Aftertreatment of the Exhaust Gases of Diesel Engines
    129.
    发明申请
    Apparatus for the Aftertreatment of the Exhaust Gases of Diesel Engines 有权
    柴油发动机废气后处理装置

    公开(公告)号：US20150093298A1

    公开(公告)日：2015-04-02

    申请号：US14547982

    申请日：2014-11-19

    Applicant: Sascha Haverkamp ,  Andreas Lang ,  Michael Wolf

    Inventor： Sascha Haverkamp ,  Andreas Lang ,  Michael Wolf

    IPC: F01N3/20

    CPC classification number: F01N3/2066 ,  F01N2610/02 ,  F01N2610/14 ,  Y02T10/24

    Abstract: An exhaust gas aftertreatment device, including a bent exhaust pipe, a mixing pipe having a closed end at the exhaust pipe bend and a bell-shaped widened portion in at least partial contact with the exhaust pipe at its opposite end, and a nozzle connected to a receptacle in the mixing pipe closed end for injecting an additive into the exhaust gases, with a mixing one in the exhaust pipe between the urea nozzle and the exhaust pipe outlet in which the exhaust gases flow around the mixing pipe symmetrically and form a double eddy in the mixing pipe.

    Abstract translation: 一种废气后处理装置，包括弯曲的排气管，在排气管弯曲处具有封闭端的混合管和在其相对端与排气管至少部分接触的钟形加宽部分，以及连接到 在混合管封闭端的容器，用于将废料中的添加剂注入废气中，在尿素喷嘴和排气管出口之间的排气管中混合一个，其中废气对称地流过混合管，形成双涡流 在混合管中。

Patent Agency Ranking