公开(公告)号：US20240259241A1

公开(公告)日：2024-08-01

申请号：US18631912

申请日：2024-04-10

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Chenchen Liu ,  Xun Yang ,  Xiaohui Peng

IPC: H04L27/20 ,  H04J3/06

CPC classification number: H04L27/2035 ,  H04J3/0658

Abstract: Embodiments of this application provide a method and an apparatus for transmitting a physical layer protocol data unit. The method includes: generating a synchronization header field based on a first sequence or a third sequence, where a side lobe of a periodic cross-correlation function of the first sequence and a second sequence is a constant value, the first sequence is a binary sequence consisting of 1 and 0, the second sequence is a binary phase shift keying sequence corresponding to the first sequence, a side lobe of a periodic autocorrelation function of the third sequence is a constant value, and the third sequence is a binary phase shift keying sequence consisting of 1 and −1; and sending a physical layer protocol data unit PPDU on a target channel, where the PPDU includes the synchronization header field.

公开(公告)号：US20180241593A1

公开(公告)日：2018-08-23

申请号：US15899058

申请日：2018-02-19

Applicant: QUALCOMM Incorporated

Inventor： Vijayvaradharaj TIRUCHERAI MURALIDHARAN ,  Shashidhar VUMMINTALA ,  Gowrisankar SOMICHETTY ,  Arvind SRIDHARAN

IPC: H04L27/00 ,  H04L5/00 ,  H04J11/00 ,  H04L27/20

CPC classification number: H04L27/0008 ,  H04J11/0066 ,  H04J2011/0009 ,  H04L5/001 ,  H04L5/0023 ,  H04L5/0048 ,  H04L5/0064 ,  H04L5/0091 ,  H04L5/14 ,  H04L27/2035 ,  H04L27/2627 ,  H04L27/2633 ,  H04L27/2649 ,  H04W72/0453

Abstract: Techniques and apparatus for transmission and reception with partial allocation in orthogonal frequency division multiple access (OFDMA)/single-carrier frequency division multiple access (SC-FDMA) systems are provided. One technique includes determining first parameter(s) to apply to transmission/receive processing of a signal, based in part on a resource allocation for the signal. The resource allocation is partitioned out of a larger system bandwidth. Second parameter(s) to apply to the transmission/receive processing are determined based at least in part on the first parameter(s). Transmission/receive processing of the signal is performed in accordance with the first and second parameters.

公开(公告)号：US08639118B2

公开(公告)日：2014-01-28

申请号：US12897787

申请日：2010-10-05

Applicant: Kuang-Tsan Wu ,  John D. McNicol ,  David F. Welch ,  Stephen G. Grubb ,  Pierre Mertz

Inventor： Kuang-Tsan Wu ,  John D. McNicol ,  David F. Welch ,  Stephen G. Grubb ,  Pierre Mertz

IPC: H04J14/02

CPC classification number: H04J14/02 ,  H04B10/616 ,  H04J14/0224 ,  H04J14/0227 ,  H04J14/0241 ,  H04J14/026 ,  H04J14/0279 ,  H04J14/06 ,  H04L1/0007 ,  H04L1/0009 ,  H04L5/0008 ,  H04L25/03834 ,  H04L27/0008 ,  H04L27/2035 ,  H04L27/223 ,  H04L27/34

Abstract: Consistent with the present disclosure, data, in digital form, is received by a transmit nodes of an optical communication, and converted to analog signal by a digital-to-analog converter (DAC) to drive a modulator. The modulator, in turn, modulates light at one of a plurality of wavelengths in accordance with the received data. The modulated light is then transmitted over an optical communication path to a receive node. At the receive node, the modulated optical signal, as well as other modulated optical signals are supplied to a photodetector circuit, which receives additional light at one of the optical signal wavelengths from a local oscillator laser. An analog-to-digital converter (ADC) is provided in the receive node to convert the electrical signals output from the photodetector into digital form. The output from the ADC is then filtered in the electrical domain, such that optical demultiplexing of individual channels is unnecessary.

Abstract translation: 与本公开一致，数字形式的数据由光通信的发射节点接收，并由数模转换器（DAC）转换为模拟信号以驱动调制器。 调制器又根据接收的数据调制多个波长中的一个波长的光。 然后将调制的光通过光通信路径传输到接收节点。 在接收节点处，调制的光信号以及其它调制的光信号被提供给光电检测器电路，光电检测器电路从本地振荡器激光器接收来自光信号波长之一的附加光。 在接收节点中提供模数转换器（ADC），以将从光电检测器输出的电信号转换为数字形式。 然后在电域中对来自ADC的输出进行滤波，使得各个信道的光解复用是不必要的。

公开(公告)号：US07356091B2

公开(公告)日：2008-04-08

申请号：US10731354

申请日：2003-12-09

Applicant: Frank Liu

Inventor： Frank Liu

IPC: H04L27/04

CPC classification number: H04L27/361 ,  H04L27/2003 ,  H04L27/2035

Abstract: The invention relates to a system for processing an electromagnetic input signal in which processing circuitry may be used to produce a bounded phase signal, such as by calculating an n-bit 2's compliment number in the range of [−1, 1] from phase sample information for an input wave; and producing an unwrapped phase difference signal from the bound phase signal, such as by taking a 2's compliment subtraction using another wrapped phase signal from previous phase sample information. A corrected phase signal may also be used by taking a 2's complement addition using the bounded phase signal, wherein the unwrapped phase difference signal is produced using the corrected phase signal.

Abstract translation: 本发明涉及一种用于处理电磁输入信号的系统，其中处理电路可用于产生有界相位信号，例如通过从相位采样计算[-1,1]范围内的n位2的补码数 输入波信息; 并且从绑定相位信号产生展开的相位差信号，例如通过使用来自前一相位样本信息的另一个包裹相位信号进行2的补码减法。 也可以通过使用有界相位信号进行2的补码加法来使用校正的相位信号，其中使用校正的相位信号产生展开的相位差信号。

公开(公告)号：US20060238396A1

公开(公告)日：2006-10-26

申请号：US11371322

申请日：2006-03-07

Applicant: Keith Bertrand

Inventor： Keith Bertrand

IPC: H03M3/00

CPC classification number: H03K7/04 ,  H03K7/06 ,  H04L25/4904 ,  H04L25/493 ,  H04L27/2035

Abstract: Disclosed herein is a method and apparatus used to add high-performance phase modulation to an applied input signal with data or clock edges which overcomes limitations of range, bandwidth and operating data rate by utilizing parallel devices to singularly modulate rising and falling edges separately and then re-add them together. In an embodiment of this invention, T-type (toggle) flip flops and exclusive-OR gates are used to achieve very high-performance results.

Abstract translation: 本文公开了一种用于将高性能相位调制添加到具有数据或时钟边沿的应用输入信号的方法和装置，其通过利用并行装置单独地单独调制上升沿和下降沿来克服范围，带宽和操作数据速率的限制，然后 将它们重新添加在一起。 在本发明的一个实施例中，T型（触发）触发器和异或门用于实现非常高性能的结果。

公开(公告)号：US6081550A

公开(公告)日：2000-06-27

申请号：US23860

申请日：1998-02-13

Applicant: Michael Wolf

Inventor： Michael Wolf

IPC: H04J3/06 ,  H04J7/00 ,  H04J9/00 ,  H04L1/24 ,  H04L7/00 ,  H04L27/20 ,  H04L27/233 ,  H04Q11/04 ,  H04B3/46

CPC classification number: H04J3/0647 ,  H04J7/00 ,  H04J9/00 ,  H04L1/242 ,  H04L27/2035 ,  H04L27/2334 ,  H04L7/0008 ,  H04J2203/006 ,  H04J2203/0062

Abstract: The indicated test method makes it possible to test clock paths via which a reference clock is transmitted to synchronize network elements in a synchronous digital telecommunications system. To that end the reference clock is marked at the start of the clock path being tested by modulating information thereon. It is observed at the end of the clock path being tested whether the reference clock contains the information modulated thereon at the start. This information is configured so that it does not impair the operation of the synchronous digital telecommunications system. A network element is furthermore indicated, which is in a position to produce by itself the phase modulation required for a test, through its clock generator.

Abstract translation: 所指示的测试方法使得可以测试发送参考时钟的时钟路径以同步同步数字电信系统中的网络元件。 为此，参考时钟在通过调制信息测试的时钟路径的开始处被标记。 在时钟路径结束时观察到，参考时钟是否包含在开始时调制的信息。 该信息被配置为不损害同步数字电信系统的操作。 此外，还指出了网络元件，其通过其时钟发生器处于能够自身产生测试所需的相位调制的位置。

公开(公告)号：US5600673A

公开(公告)日：1997-02-04

申请号：US566082

申请日：1995-12-01

Applicant: Kimiyoshi Kimura ,  Kenichi Shiraishi ,  Souichi Shinjo

Inventor： Kimiyoshi Kimura ,  Kenichi Shiraishi ,  Souichi Shinjo

IPC: H04L27/18 ,  H04L27/00 ,  H04L27/22 ,  H04B3/46

CPC classification number: H04L27/2067 ,  H04L27/0012 ,  H04L27/2035

Abstract: A circuit for discriminating the modulation type of a received signal capable of discriminating the modulation type at high speed. This circuit includes: a clock recovery circuit for recovering a data clock from received data; a phase difference detector for detecting a phase difference between the data clock recovered by the clock recovery circuit and the received data; a deviation calculation circuit for calculating a deviation between the phase difference detected by the phase difference detector and a deviation reference value preset in accordance with a modulation type; a squaring circuit for squaring the deviation calculated by the deviation calculation circuit; an average value calculation circuit for calculating an average value of a predetermined plurality number of consecutive ones of the square output calculated by the squaring circuit; and a comparator for comparing the average value calculated by the average value calculation circuit with a predetermined decision reference value and outputting a discrimination signal in accordance with the comparison results.

Abstract translation: 用于鉴别能够高速识别调制类型的接收信号的调制类型的电路。 该电路包括：时钟恢复电路，用于从接收的数据中恢复数据时钟; 相位差检测器，用于检测由时钟恢复电路恢复的数据时钟与接收的数据之间的相位差; 偏差计算电路，用于计算由相位差检测器检测的相位差与根据调制类型预设的偏差参考值之间的偏差; 用于对由偏差计算电路计算的偏差进行平方的平方电路; 平均值计算电路，用于计算由平方电路计算出的平方输出的预定多个连续个数的平均值; 以及比较器，用于将由平均值计算电路计算的平均值与预定的判定参考值进行比较，并根据比较结果输出鉴别信号。

公开(公告)号：US5235619A

公开(公告)日：1993-08-10

申请号：US498083

申请日：1990-03-20

Applicant: Robert J. Beyers, II ,  Charles R. Bramhall ,  Gregory S. Durden ,  Robert J. Edwards ,  Ray T. Haman, Jr. ,  Douglas J. Hoder ,  Donald R. Huntley ,  John A. Kennedy ,  Emory L. McGinty, Jr. ,  Jay C. McMullan, Jr. ,  David J. Naddor ,  Randolph J. Schaubs ,  Jesse M. Still ,  Anthony J. Wasilewski ,  Lamar E. West, Jr. ,  Donovan S. White

Inventor： Robert J. Beyers, II ,  Charles R. Bramhall ,  Gregory S. Durden ,  Robert J. Edwards ,  Ray T. Haman, Jr. ,  Douglas J. Hoder ,  Donald R. Huntley ,  John A. Kennedy ,  Emory L. McGinty, Jr. ,  Jay C. McMullan, Jr. ,  David J. Naddor ,  Randolph J. Schaubs ,  Jesse M. Still ,  Anthony J. Wasilewski ,  Lamar E. West, Jr. ,  Donovan S. White

IPC: H04J1/00 ,  H04L27/20 ,  H04N21/258 ,  H04N21/442

CPC classification number: H04N21/44222 ,  H04L27/2035 ,  H04N21/25891

Abstract: A method of transferring a data message from a remote unit to a central location is provided. A plurality of data channels is selected for transmitting the data message from the remote unit to the central location. At least one random transmit time is generated for transmitting the data message for each of the plurality of data channels. The data message is transmitted over the plurality of data channels at the transmit times. An apparatus for transferring a data message from a remote unit to a central location is also provided.

Abstract translation: 提供了将数据消息从远程单元传送到中心位置的方法。 选择多个数据信道用于将数据消息从远程单元发送到中心位置。 生成用于发送多个数据信道中的每一个的数据消息的至少一个随机发送时间。 数据消息在发送时通过多个数据信道发送。 还提供了一种用于将数据消息从远程单元传送到中心位置的装置。

公开(公告)号：US5225902A

公开(公告)日：1993-07-06

申请号：US671539

申请日：1991-03-19

Applicant: Jay C. McMullan, Jr.

Inventor： Jay C. McMullan, Jr.

IPC: H04H20/38 ,  H04H20/42 ,  H04H60/22 ,  H04H60/96 ,  H04H60/97 ,  H04L5/06 ,  H04L27/20 ,  H04L27/227 ,  H04N7/10 ,  H04N7/173 ,  H04N21/258 ,  H04N21/442

CPC classification number: H04N7/17309 ,  H04H20/42 ,  H04H60/96 ,  H04H60/97 ,  H04L27/2035 ,  H04L27/2276 ,  H04L5/06 ,  H04N21/25891 ,  H04N21/44222 ,  H04N7/10 ,  H04H20/38 ,  H04H2201/70 ,  H04H60/22

Abstract: A method for automatically selecting optimum frequencies for transmitting data from remote terminals upstream to a system manager is provided. The system manager initially selects a set of frequencies from a larger set of available frequencies and transmits a command downstream to each remote terminal indicating which frequencies to use. Each remote terminal transmits data messsages on each selected frequency in response to addressed commands generated by the system manager. The system manager receives and counts the data messages on each of the frequencies, and after a statistically significant number of messages are received, removes from use the frequency with the lowest number of data messages received. This frequency is replaced with either (1) a previously untried frequency, or if all frequencies have been tried, (2) a previously tried frequency with the highest number of data messages received. In a preferred embodiment, new frequencies are removed from use and added to use only when the number of data messages received and the received signal level on a particular frequency falls within certain predetermined ranges. In another embodiment, the transmission level for a particular frequency is recalibrated when the number of data message received and the received signal level falls within other predetermined ranges. In a further embodiment, two or more sets of optimum frequencies are automatically chosen for different times during the day and the system manager is able to immediately switch between these sets at the appropriate times.

Abstract translation: 提供了一种用于自动选择从上游向系统管理器发送数据的最佳频率的方法。 系统管理器最初从较大的一组可用频率中选择一组频率，并向每个远程终端下游发送一个指示要使用哪些频率的命令。 每个远程终端响应于系统管理器生成的寻址命令，在每个选定频率上传输数据信息。 系统管理器接收并对每个频率上的数据消息进行计数，并且在接收到统计上显着数量的消息之后，从接收到的数据消息数最少的频率中删除。 该频率被替换为（1）先前未经测试的频率，或者如果已经尝试所有频率，则（2）先前尝试的接收到数据消息数最多的频率。 在优选实施例中，新频率从使用中移除并且仅在接收到的数据消息的数量和特定频率上的接收信号电平落入特定预定范围内时被使用。 在另一个实施例中，当接收到的数据消息的数量和接收的信号电平落入其他预定范围内时，针对特定频率的传输电平被重新校准。 在另一实施例中，在白天的不同时间自动选择两组或更多组最佳频率，并且系统管理员能够在适当的时间立即在这些组之间切换。

公开(公告)号：US4742532A

公开(公告)日：1988-05-03

申请号：US861049

申请日：1986-05-08

Applicant: Harold R. Walker

Inventor： Harold R. Walker

IPC: H04L27/20 ,  H04L27/227 ,  H04L27/18

CPC classification number: H04L27/2272 ,  H04L27/2035

Abstract: There is disclosed a high speed data transmission system for transmitting a binary data signal over a communications path. The binary data signal is clocked at a given period. The system comprises encoded means responsive to a binary NRZ input data signal to provide at an output an encoded digital signal having time periods greater than multiples of the clock period, whereby the encoded signal occupies a lesser effective bandwidth than the NRZ signal would occupy. There are balanced modulator means having an input responsive to the encoded signal and another input adapted to receive a carrier frequency to provide at an output a double sideband suppressed carrier signal. Coupled to the output of the balanced modulator are narrow bandwidth filtering means including first low pass and second high pass parallel filter paths each having a common input terminal coupled to the output of the modulator. The ouputs of the low and high pass filters are symmetrically combined to provide a narrow single sideband signal for transmission characterized in that transitions between binary levels in said encoded signal are manifested by distinct phase changes in said single sideband signal.

Abstract translation: 公开了一种用于通过通信路径发送二进制数据信号的高速数据传输系统。 二进制数据信号在给定的时间段进行计时。 该系统包括响应于二进制NRZ输入数据信号的编码装置，以在输出端提供具有大于时钟周期的倍数的时间周期的编码数字信号，由此编码信号占用比NRZ信号将占用的有效带宽更小。 存在平衡调制器装置，其具有响应于编码信号的输入和适于接收载波频率的另一输入，以在输出处提供双边带抑制载波信号。 耦合到平衡调制器的输出是窄带宽滤波装置，包括第一低通和第二高通并行滤波器路径，每个具有耦合到调制器的输出的公共输入端。 低通滤波器和高通滤波器的输出被对称组合以提供用于传输的窄单边带信号，其特征在于，所述编码信号中的二进制电平之间的转换由所述单边带信号中的不同相位变化表现出来。