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公开(公告)号:US10445228B2
公开(公告)日:2019-10-15
申请号:US15786408
申请日:2017-10-17
Applicant: MICRON TECHNOLOGY, INC.
Inventor: Graziano Mirichigni , Danilo Caraccio , Luca Porzio
Abstract: Methods and apparatuses are disclosed for requesting ready status information from a memory. One example apparatus includes a memory and a host coupled to the memory. The host is configured to provide a plurality of memory access requests to the memory, to request ready status information regarding whether the memory is ready to execute a memory access request of the plurality of memory access requests, and to request execution of the memory access request responsive to the ready status information.
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公开(公告)号:US10430085B2
公开(公告)日:2019-10-01
申请号:US15345783
申请日:2016-11-08
Applicant: Micron Technology, Inc.
Inventor: Paolo Amato , Daniele Balluchi , Danilo Caraccio , Emanuele Confalonieri , Marco Dallabora
IPC: G06F3/06 , G06F12/1009 , G06F11/10 , G11C16/34
Abstract: The present disclosure includes apparatuses and methods related to memory operations on data. An example method can include executing an operation by writing a first managed unit to a second managed unit, and placing the first managed unit in a free state, wherein the first managed unit is located at a particular distance from the second managed unit.
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公开(公告)号:US20190294547A1
公开(公告)日:2019-09-26
申请号:US15927530
申请日:2018-03-21
Applicant: Micron Technology, Inc.
Inventor: Danilo Caraccio , Emanuele Confalonieri , Marco Dallabora , Roberto Izzi , Paolo Amato , Daniele Balluchi , Luca Porzio
IPC: G06F12/0862 , G06F12/10
Abstract: An example apparatus comprises a hybrid memory system and a controller coupled to the hybrid memory system. The controller may be configured to cause data to be selectively stored in the hybrid memory system responsive to a determination that an exception involving the data has occurred.
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公开(公告)号:US20190294356A1
公开(公告)日:2019-09-26
申请号:US15927339
申请日:2018-03-21
Applicant: Micron Technology, Inc.
Inventor: Danilo Caraccio , Emanuele Confalonieri , Marco Dallabora , Roberto Izzi , Paolo Amato , Daniele Balluchi , Luca Porzio
IPC: G06F3/06
Abstract: An example apparatus includes a hybrid memory system to couple to a host and a controller coupled to the hybrid memory system. The controller may be configured to assign a sensitivity to a command and cause the command to be selectively diverted to the hybrid memory system based, at least in part, on the assigned sensitivity.
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公开(公告)号:US20190102112A1
公开(公告)日:2019-04-04
申请号:US16207453
申请日:2018-12-03
Applicant: Micron Technology, Inc.
Inventor: Victor Y. Tsai , Danilo Caraccio , Daniele Balluchi , Neal A. Galbo , Robert Warren
IPC: G06F3/06
Abstract: The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory system from a host, sending a command response from the memory system to the host that indicates the memory system is ready to receive a command in a command queue of the memory system, and receiving, in response to sending the command response, a command descriptor block for the command at the memory system from the host.
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公开(公告)号:US20180336146A1
公开(公告)日:2018-11-22
申请号:US15815209
申请日:2017-11-16
Applicant: Micron Technology, Inc.
Inventor: Greg Blodgett , Daniele Balluchi , Danilo Caraccio , Graziano Mirichigni
Abstract: The present disclosure includes apparatuses and methods for providing energy information to memory. An embodiment includes determining, by a host, that a charge level of an energy source coupled to the host has reached or exceeded a threshold value, and transmitting, from the host to a memory device coupled to the host, signaling indicative of an energy mode for the memory device, wherein the signaling is transmitted based at least in part on determining that the charge level of the energy source has reached or exceeded the threshold.
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127.
公开(公告)号:US09977603B2
公开(公告)日:2018-05-22
申请号:US15144141
申请日:2016-05-02
Applicant: Micron Technology, Inc.
Inventor: Luca Porzio , Graziano Mirichigni , Danilo Caraccio
CPC classification number: G06F9/4401 , G06F9/4411 , G06F13/10 , G06F13/1668
Abstract: A memory device includes a memory array having non-volatile memory cells, and a memory controller configured to detect a known state to enter based, at least in part, on communication with a host device, and reconfigure the memory device to prepare for the known state. A host controller is configured to communicate with the memory device to support a feature and protocol for detecting the known state for operation of the memory device. Related methods and systems are also disclosed.
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公开(公告)号:US20180129442A1
公开(公告)日:2018-05-10
申请号:US15862472
申请日:2018-01-04
Applicant: Micron Technology, Inc.
Inventor: Danilo Caraccio , Graziano Mirichigni , Gianfranco Santopietro , Gianfranco Ferrante , Emanuele Confalonieri
IPC: G06F3/06
CPC classification number: G06F3/0643 , G06F3/061 , G06F3/0679
Abstract: A controller of a memory device controls placement of data blocks by receiving, from a host electronic device, one or more commands of a memory system protocol. The commands include a write command with blocks of data to be stored in the memory device and contextual file system data for the blocks of data. The contextual file system data includes file metadata, file attributes, or both that identify an association of the one or more blocks of data with a file. The file is made up of the one or more blocks of data. The controller identifies the association of the one or more blocks of data with the file and executes the one or more commands, such that the one or more blocks of data are stored in the memory device with a placement based upon the association
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公开(公告)号:US20180129423A1
公开(公告)日:2018-05-10
申请号:US15345783
申请日:2016-11-08
Applicant: Micron Technology, Inc.
Inventor: Paolo Amato , Daniele Balluchi , Danilo Caraccio , Emanuele Confalonieri , Marco Dallabora
IPC: G06F3/06 , G06F12/1009 , G06F11/10
CPC classification number: G06F3/0611 , G06F3/0616 , G06F3/0619 , G06F3/0634 , G06F3/0656 , G06F3/0659 , G06F3/0679 , G06F3/0683 , G06F11/1048 , G06F11/1076 , G06F12/1009 , G06F2212/65 , G11C16/3495
Abstract: The present disclosure includes apparatuses and methods related to memory operations on data. An example method can include executing an operation by writing a first managed unit to a second managed unit, and placing the first managed unit in a free state, wherein the first managed unit is located at a particular distance from the second managed unit.
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公开(公告)号:US20160140049A1
公开(公告)日:2016-05-19
申请号:US14547011
申请日:2014-11-18
Applicant: Micron Technology, Inc.
Inventor: Graziano Mirichigni , Danilo Caraccio
Abstract: Systems and methods for vendor-agnostic access to non-volatile memory of a wireless memory tag include: detecting, via a wireless memory host, a wireless memory tag; providing a vendor-agnostic command to the wireless memory tag to affect a change in a register-based interface of the wireless memory tag, wherein the change results in reading data from non-volatile memory of the wireless memory tag, writing data to the non-volatile memory of the wireless memory tag, or both.
Abstract translation: 供应商不可知访问无线存储器标签的非易失性存储器的系统和方法包括:经由无线存储器主机检测无线存储器标签; 向所述无线存储器标签提供与供应商无关的命令以影响所述无线存储器标签的基于寄存器的接口的改变,其中所述改变导致从所述无线存储器标签的非易失性存储器读取数据,将数据写入所述非 - - 无线存储器标签的易失性存储器,或两者。
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