公开(公告)号：US20160035974A1

公开(公告)日：2016-02-04

申请号：US14884035

申请日：2015-10-15

Applicant: Micron Technology, Inc.

Inventor： Martin Schubert ,  Shu Qin ,  Scott E. Sills ,  Durai Vishak Nirmal Ramaswamy ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L45/00

CPC classification number: H01L45/1608 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/141 ,  H01L45/146 ,  H01L45/16

Abstract: Some embodiments include a memory cell having a first electrode, and an intermediate material over and directly against the first electrode. The intermediate material includes stabilizing species corresponding to one or both of carbon and boron. The memory cell also has a switching material over and directly against the intermediate material, an ion reservoir material over the switching material, and a second electrode over the ion reservoir material. Some embodiments include methods of forming memory cells.

公开(公告)号：US20140234996A1

公开(公告)日：2014-08-21

申请号：US14261901

申请日：2014-04-25

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu ,  John Mark Meldrim ,  Shanming Mou ,  Everett Allen McTeer

IPC: H01L33/62

CPC classification number: H01L33/62 ,  H01L33/0066 ,  H01L33/0075 ,  H01L33/32 ,  H01L33/40 ,  H01L33/46 ,  H01L2924/0002 ,  H01L2933/0016 ,  H01L2933/0066 ,  H01L2924/00

Abstract: A composition and method for formation of ohmic contacts on a semiconductor structure are provided. The composition includes a TiAlxNy material at least partially contiguous with the semiconductor structure. The TiAlxNy material can be TiAl3. The composition can include an aluminum material, the aluminum material being contiguous to at least part of the TiAlxNy material, such that the TiAlxNy material is between the aluminum material and the semiconductor structure. The method includes annealing the composition to form an ohmic contact on the semiconductor structure.

Abstract translation: 提供了一种在半导体结构上形成欧姆接触的组合物和方法。 该组合物包括与半导体结构至少部分邻接的TiAl x N y材料。 TiAlxNy材料可以是TiAl3。 组合物可以包括铝材料，铝材料与TiAl x N y材料的至少一部分相邻，使得TiAl x N y材料在铝材料和半导体结构之间。 该方法包括退火组合物以在半导体结构上形成欧姆接触。

公开(公告)号：US20140206183A1

公开(公告)日：2014-07-24

申请号：US14225053

申请日：2014-03-25

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu

IPC: H01L21/28

CPC classification number: H01L29/66833 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1157 ,  H01L29/4234 ,  H01L29/66825 ,  H01L29/792

Abstract: Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at least some portions of the different types of gates. FET and charge storage transistor gate stacks may be formed. The gate stacks may each include a gate material, an insulative material, and a sacrificial material. The sacrificial material is removed from the FET and charge storage transistor gate stacks. The insulative material of the FET gate stacks is etched through. A conductive material is formed over the FET gate stacks and over the charge storage transistor gate stacks. The conductive material physically contacts the gate material of the FET gate stacks, and is separated from the gate material of the charge storage transistor gate stacks by the insulative material remaining in the charge storage transistor gate stacks. Some embodiments include gate structures.

Abstract translation: 一些实施例包括形成电荷存储晶体管栅极和标准FET栅极的方法，其中公共处理用于制造不同类型栅极的至少一些部分。 可以形成FET和电荷存储晶体管栅极堆叠。 栅极堆叠可以各自包括栅极材料，绝缘材料和牺牲材料。 牺牲材料从FET中去除并对存储晶体管栅极堆叠进行充电。 FET栅极堆叠的绝缘材料被蚀刻通过。 导电材料形成在FET栅叠层上方和电荷存储晶体管栅堆上。 导电材料物理地接触FET栅极堆叠的栅极材料，并且通过残留在电荷存储晶体管栅极堆叠中的绝缘材料与电荷存储晶体管栅极堆叠的栅极材料分离。 一些实施例包括门结构。

公开(公告)号：US20140027883A1

公开(公告)日：2014-01-30

申请号：US14043536

申请日：2013-10-01

Applicant: Micron Technology, Inc.

Inventor： Yongjun Jeff Hu

IPC: H01L29/94

CPC classification number: H01L29/945 ,  H01L21/743 ,  H01L21/76846 ,  H01L21/76847 ,  H01L27/10852 ,  H01L28/75 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Metal-insulator-metal capacitors with a bottom electrode including at least two portions of a metal nitride material. At least one of the portions of the metal nitride material includes a different material than another portion. Interconnects including at least two portions of a metal nitride material are also disclosed, at least one of the portions of the metal nitride material are formed from a different material than another portion of the metal nitride material. Methods for fabricating such MIM capacitors and interconnects are also disclosed, as are semiconductor devices including such MIM capacitors and interconnects.

Abstract translation: 金属 - 绝缘体 - 金属电容器，其具有包括金属氮化物材料的至少两部分的底部电极。 金属氮化物材料的至少一部分包括与另一部分不同的材料。 还公开了包括金属氮化物材料的至少两部分的互连件，金属氮化物材料的至少一部分由与金属氮化物材料的另一部分不同的材料形成。 还公开了制造这种MIM电容器和互连的方法，以及包括这种MIM电容器和互连的半导体器件。

公开(公告)号：US20130072006A1

公开(公告)日：2013-03-21

申请号：US13674674

申请日：2012-11-12

Applicant: Micron Technology, Inc.

Inventor： Lequn Jennifer Liu ,  Shu Qin ,  Allen McTeer ,  Yongjun Jeff Hu

IPC: H01L21/223

CPC classification number: H01L21/2236 ,  H01L21/26506 ,  H01L21/2652 ,  H01L21/26526 ,  H01L29/66575

Abstract: Some embodiments include methods of forming one or more doped regions in a semiconductor substrate. Plasma doping may be used to form a first dopant to a first depth within the substrate. The first dopant may then be impacted with a second dopant to knock the first dopant to a second depth within the substrate. In some embodiments the first dopant is p-type (such as boron) and the second dopant is neutral type (such as germanium). In some embodiments the second dopant is heavier than the first dopant.

Abstract translation: 一些实施例包括在半导体衬底中形成一个或多个掺杂区域的方法。 可以使用等离子体掺杂来形成第一掺杂剂到衬底内的第一深度。 然后可以用第二掺杂剂冲击第一掺杂剂以将第一掺杂剂敲入衬底内的第二深度。 在一些实施方案中，第一掺杂剂是p型（例如硼），第二掺杂剂是中性型（例如锗）。 在一些实施方案中，第二掺杂剂比第一掺杂剂重。