公开(公告)号：US20150220446A1

公开(公告)日：2015-08-06

申请号：US14172862

申请日：2014-02-04

Applicant: Netronome Systems, Inc.

Inventor： Gavin J. Stark ,  Rolf Neugebauer

IPC: G06F12/10 ,  G06F9/46 ,  G06F13/24 ,  G06F12/08 ,  G06F13/16

CPC classification number: G06F9/467 ,  G06F12/1081 ,  G06F12/109 ,  G06F13/385 ,  G06F2212/657 ,  G06F2213/0026

Abstract: A transactional memory receives a command, where the command includes an address and a novel GAA (Generate Alert On Action) bit. If the GAA bit is set and if the transactional memory is enabled to generate alerts and if the command is a write into a memory of the transactional memory, then the transactional memory outputs an alert in accordance with preconfigured parameters. For example, the alert may be preconfigured to carry a value or key usable by the recipient of the alert to determine the reason for the alert. The alert may be set up to include the address of the memory location in the transactional memory that was written. The transactional memory may be set up to send the alert to a predetermined destination. The outputting of the alert may be a writing of information into a predetermined destination, or may be an outputting of an interrupt signal.

Abstract translation: 事务存储器接收命令，其中命令包括地址和新颖的GAA（生成警报在动作）位。 如果GAA位被设置，并且事务存储器被启用以产生警报，并且如果命令是写入事务存储器的存储器，则事务存储器根据预先配置的参数输出警报。 例如，警报可以被预配置为携带警报的接收者可使用的值或密钥来确定警报的原因。 警报可能被设置为将内存位置的地址包括在写入的事务内存中。 事务存储器可以被设置为将警报发送到预定的目的地。 警报的输出可以是将信息写入预定目的地，或者可以是中断信号的输出。

公开(公告)号：US20150193266A1

公开(公告)日：2015-07-09

申请号：US14151677

申请日：2014-01-09

Applicant: Netronome Systems, Inc.

Inventor： Gavin J. Stark ,  Steven W. Zagorianakos

IPC: G06F9/46 ,  G06F9/38

CPC classification number: G06F9/467

Abstract: An automaton hardware engine employs a transition table organized into 2n rows, where each row comprises a plurality of n-bit storage locations, and where each storage location can store at most one n-bit entry value. Each row corresponds to an automaton state. In one example, at least two NFAs are encoded into the table. The first NFA is indexed into the rows of the transition table in a first way, and the second NFA is indexed in to the rows of the transition table in a second way. Due to this indexing, all rows are usable to store entry values that point to other rows.

Abstract translation: 自动机硬件引擎采用组织成2n行的转换表，其中每行包括多个n位存储位置，并且其中每个存储位置最多可以存储一个n位输入值。 每行对应于自动机状态。 在一个示例中，至少两个NFA被编码到表中。 第一个NFA以第一种方式索引到转换表的行中，第二个NFA以第二种方式索引到转换表的行中。 由于此索引，所有行都可用于存储指向其他行的条目值。

公开(公告)号：US09069603B2

公开(公告)日：2015-06-30

申请号：US14287012

申请日：2014-05-24

Applicant: Netronome Systems, Inc.

Inventor： Gavin J. Stark

IPC: G06F3/00 ,  G06F13/00 ,  G06F12/00 ,  G06F12/02 ,  G06F12/06 ,  G06F9/46 ,  G06F13/16

CPC classification number: G06F9/467 ,  G06F12/00 ,  G06F13/1615 ,  G06F13/287 ,  G06F13/4022 ,  G06F13/4234 ,  H04L45/745 ,  Y02D10/14 ,  Y02D10/151

Abstract: A transactional memory (TM) receives an Atomic Metering Command (AMC) across a bus from a processor. The command includes a memory address and a meter pair indicator value. In response to the AMC, the TM pulls an input value (IV). The TM uses the memory address to read a word including multiple credit values from a memory unit. Circuitry within the TM selects a pair of credit values, subtracts the IV from each of the pair of credit values thereby generating a pair of decremented credit values, compares the pair of decremented credit values with a threshold value, respectively, thereby generating a pair of indicator values, performs a lookup based upon the pair of indicator values and the meter pair indicator value, and outputs a selector value and a result value that represents a meter color. The selector value determines the credit values written back to the memory unit.

Abstract translation: 事务存储器（TM）从处理器接收总线上的原子计量命令（AMC）。 该命令包括存储器地址和仪表对指示器值。 对于AMC，TM提取输入值（IV）。 TM使用存储器地址从存储器单元读取包括多个信用值的单词。 TM内的电路选择一对信用值，从该对信用值中的每一个中减去IV，从而生成一对递减的信用值，将一对递减的信用值与阈值进行比较，从而产生一对 指示符值，根据指示符值对和仪表对指示符值执行查找，并输出选择器值和表示仪表颜色的结果值。 选择器值确定写入存储单元的信用值。

公开(公告)号：US20150016457A1

公开(公告)日：2015-01-15

申请号：US13941484

申请日：2013-07-13

Applicant: Netronome Systems, Inc.

Inventor： Chirag P. Patel ,  Gavin J. Stark

IPC: H04L12/931

CPC classification number: H04L49/20

Abstract: An egress packet modifier includes a script parser and a pipeline of processing stages. Rather than performing egress modifications using a processor that fetches and decodes and executes instructions in a classic processor fashion, and rather than storing a packet in memory and reading it out and modifying it and writing it back, the packet modifier pipeline processes the packet by passing parts of the packet through the pipeline. A processor identifies particular egress modifications to be performed by placing a script code at the beginning of the packet. The script parser then uses the code to identify a specific script of opcodes, where each opcode defines a modification. As a part passes through a stage, the stage can carry out the modification of such an opcode. As realized using current semiconductor fabrication process, the packet modifier can modify 200M packets/second at a sustained rate of up to 100 gigabits/second.

Abstract translation: 出口分组修饰符包括脚本解析器和处理阶段的流水线。 而不是使用处理器执行出口修改，处理器以经典处理器的方式获取和解码并执行指令，而不是将数据包存储在存储器中并将其读出并修改它并将其写回来，数据包修改器流水线通过传递来处理数据包 部分数据包通过管道。 处理器通过将脚本代码放置在分组的开始处来识别要执行的特定出口修改。 脚本解析器然后使用代码来识别操作码的特定脚本，其中每个操作码定义了一个修改。 作为一个阶段，舞台可以进行这样一个操作码的修改。 通过使用当前的半导体制造工艺实现，分组修改器可以以高达100吉比特/秒的持续速率修改200M分组/秒。

公开(公告)号：US20150003250A1

公开(公告)日：2015-01-01

申请号：US13928235

申请日：2013-06-26

Applicant: Netronome Systems, Inc.

Inventor： Richard P. Bouley ,  Gavin J. Stark

IPC: H04L12/801 ,  H04L12/911

CPC classification number: H04L47/39 ,  H04L47/822

Abstract: A high-speed credit-based allocator circuit receives an allocation request to make an allocation to one of a set of a processing entities. The allocator circuit maintains a chain of bubble sorting module circuits for the set, where each bubble sorting module circuit stores a resource value and an indication of a corresponding processing entity. A bubble sorting operation is performed so that the head of the chain tends to indicate the processing entity of the set that has the highest amount of the resource (credit) available. The allocation requested is made to the processing entity indicated by the head module circuit of the chain. The amount of the resource available to each processing entity is tracked by adjusting the resource values as allocations are made, and as allocated tasks are completed. The allocator circuit is configurable to maintain multiple chains, thereby supporting credit-based allocations to multiple sets of processing entities.

Abstract translation: 高速信用分配器电路接收分配请求以对一组处理实体之一进行分配。 分配器电路为该组保持一连串的气泡分类模块电路，其中每个气泡分选模块电路存储资源值和对应的处理实体的指示。 执行气泡排序操作，使得链的头倾向于指示具有最高资源量（信用）可用的集合的处理实体。 所请求的分配是由链的头模块电路指示的处理实体。 每个处理实体可用的资源量通过调整资源值进行跟踪，当分配完成时，并且分配的任务完成。 分配器电路可配置为维护多个链，从而支持基于信用的分配给多组处理实体。