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    Canisters
    132.
    发明授权
    Canisters 有权
    罐子

    公开(公告)号：US08177894B2

    公开(公告)日：2012-05-15

    申请号：US12486119

    申请日：2009-06-17

    Applicant: Toshio Yoshida ,  Tsuneyuki Kurata ,  Norihisa Yamamoto ,  Yukihiro Kaneda

    Inventor： Toshio Yoshida ,  Tsuneyuki Kurata ,  Norihisa Yamamoto ,  Yukihiro Kaneda

    IPC: F02M25/08 ,  B01D53/04

    CPC classification number: F02M25/0854

    Abstract: A canister includes a canister case having an adsorbent chamber, an adsorbent housed in the adsorbent chamber of the canister case, a filter disposed between the adsorbent chamber and a port mounted on an end wall of the adsorbent chamber, and a tentative filter engaging projection provided in the adsorbent chamber. The filter is loosely fitted within the adsorbent chamber and then welded on the end wall of the adsorbent chamber. The tentative filter engaging projection tentatively holds the filter loosely fitted within the adsorbent chamber in a welding step of the filter.

    Abstract translation: 罐包括具有吸附剂室的罐壳体，容纳在罐壳体的吸附剂室中的吸附剂，设置在吸附剂室和安装在吸附剂室的端壁上的端口之间的过滤器和设置有临时过滤器接合突起的过滤器 在吸附剂室中。 过滤器松散地安装在吸附剂室内，然后焊接在吸附剂室的端壁上。 试验过滤器接合突起在过滤器的焊接步骤中暂时保持过滤器松散地装配在吸附剂室内。

    Instruction processing apparatus
    135.
    发明授权
    Instruction processing apparatus 有权
    指令处理装置

    公开(公告)号：US07962732B2

    公开(公告)日：2011-06-14

    申请号：US12654159

    申请日：2009-12-11

    Applicant: Toshio Yoshida

    Inventor： Toshio Yoshida

    IPC: G06F9/48 ,  G06F9/52

    CPC classification number: G06F9/3851 ,  G06F9/30043 ,  G06F9/30127 ,  G06F9/3857

    Abstract: An instruction processing apparatus includes a thread execution processing section executing threads each including plural instructions, a register file including a register window having plural registers, a current window pointer indicating a position of the register where the register window is possible to be inputted and outputted, a current register reading data held by the register window designated by the current window pointer to hold the data and a replacement buffer holding data transferred from the register file to the current register, a first transfer path transferring data in a register file to one of the replacement buffer, a second data transfer transferring data in a replacement buffer to one of the current registers, a calculation section executing a switching instruction of the register window, and a control section controlling, if the calculation section executes the switching instruction, the first data transfer path and the second data transfer path.

    Abstract translation: 一种指令处理装置，包括执行包括多个指令的线程的线程执行处理部分，包括具有多个寄存器的寄存器窗口的寄存器文件，指示可以输入和输出寄存器窗口的寄存器的位置的当前窗口指针， 当前寄存器读取由当前窗口指针指定的寄存器窗口保存的数据，以保存数据;以及替换缓冲器，保存从寄存器文件传送到当前寄存器的数据;第一传送路径，将寄存器文件中的数据传送到 替换缓冲器，将替换缓冲器中的数据传送到当前寄存器之一的第二数据传输;执行寄存器窗口的切换指令的计算部分;以及控制部分，如果所述计算部分执行所述切换指令，则控制所述第一数据 传输路径和第二数据传输路径。

    Instruction execution control device and instruction execution control method
    136.
    发明授权
    Instruction execution control device and instruction execution control method 失效
    指令执行控制装置和指令执行控制方法

    公开(公告)号：US07958339B2

    公开(公告)日：2011-06-07

    申请号：US12591994

    申请日：2009-12-07

    Applicant: Yasunobu Akizuki ,  Toshio Yoshida

    Inventor： Yasunobu Akizuki ,  Toshio Yoshida

    IPC: G06F9/44 ,  G06F9/52

    CPC classification number: G06F9/3851 ,  G06F9/3836

    Abstract: An instruction execution control device operates a plurality of threads in a simultaneous multi-thread system. And the instruction execution control device has a thread selection circuit (30) which detects a state where an instruction has not been completed for a predetermined period during simultaneous multi-thread operation, and controls such that all the reservation stations (5, 6 and 7) can execute only a predetermined thread. Therefore if an entry that cannot be executed from the reservation stations (5, 6 and 7) exists, execution of an entry in the thread that cannot be executed can be enabled by stopping the execution of the thread which has been executed continuously.

    Abstract translation: 指令执行控制装置在同时多线程系统中操作多个线程。 并且，指令执行控制装置具有线程选择电路（30），该线程选择电路（30）在同时进行多线程动作的同时检测指定尚未完成预定期间的状态，并且进行控制使得所有保留站（5,6,7） ）只能执行预定的线程。 因此，如果存在不能从保留站（5,6）和7中执行的条目，则可以通过停止执行连续执行的线程来执行线程中不能执行的条目。

    Instruction execution control device and instruction execution control method
    137.
    发明申请
    Instruction execution control device and instruction execution control method 失效
    指令执行控制装置和指令执行控制方法

    公开(公告)号：US20100095103A1

    公开(公告)日：2010-04-15

    申请号：US12591993

    申请日：2009-12-07

    Applicant: Yasunobu Akizuki ,  Toshio Yoshida ,  Tomohiro Tanaka ,  Ryuji Kan

    Inventor： Yasunobu Akizuki ,  Toshio Yoshida ,  Tomohiro Tanaka ,  Ryuji Kan

    IPC: G06F9/38

    CPC classification number: G06F9/3851 ,  G06F9/30123 ,  G06F9/30127 ,  G06F9/30141

    Abstract: An instruction execution control device operates a plurality of threads in a simultaneous multi-thread system. The device has architecture registers (22-0, 22-1) for each thread, and a selection circuit (32, 24) which, when an operand data required for executing a function is read from a register file (20), selects in advance a thread to be read from the register file (20). This makes it possible to select an architecture register at an early stage, and although the number of circuits in a portion for selecting the architecture registers increases, the wiring amount of the circuits can be decreased, because the architecture register of the thread to be read is selected in advance.

    Abstract translation: 指令执行控制装置在同时多线程系统中操作多个线程。 该装置具有针对每个线程的架构寄存器（22-0,22-1）和选择电路（32,24），当从寄存器文件（20）读取执行功能所需的操作数数据时，选择 推进从注册文件（20）读取的线程。 这使得能够在早期阶段选择体系结构寄存器，并且尽管用于选择架构寄存器的部分中的电路数量增加，但是由于要读取的线程的体系结构寄存器可以减少电路的布线量 提前选择。

    PROCESSING UNIT
    138.
    发明申请
    PROCESSING UNIT 有权
    处理单元

    公开(公告)号：US20100088491A1

    公开(公告)日：2010-04-08

    申请号：US12633108

    申请日：2009-12-08

    Applicant: Atsushi FUSEJIMA ,  Takashi Suzuki ,  Toshio Yoshida ,  Yasunobu Akizuki

    Inventor： Atsushi FUSEJIMA ,  Takashi Suzuki ,  Toshio Yoshida ,  Yasunobu Akizuki

    IPC: G06F9/46 ,  G06F9/30

    CPC classification number: G06F9/3851 ,  G06F9/3013 ,  G06F9/3857 ,  G06F11/3466 ,  G06F2201/88

    Abstract: A processing unit includes a plurality of thread execution units each provided with a performance analysis circuit for measuring various types of events resulting from execution of instructions and a commit stack entry unit for controlling the completion of executed instructions and each executing a thread having a plurality of instructions, a commit scope register for storing instructions of completion candidates stored in each commit stack entry unit by execution by each thread execution unit and performing processing for completion of instructions included in the thread, and a thread selecting means for sending commit events of the instructions to a performance analysis circuit provided in each thread execution unit corresponding to the instructions when performing commit processing for instructions stored in the commit scope register.

    Abstract translation: 处理单元包括多个线程执行单元，每个线程执行单元具有用于测量执行指令的各种类型的事件的性能分析电路和用于控制执行指令完成的提交堆栈输入单元，并且每个线程执行单元执行具有多个 指令，用于通过每个线程执行单元的执行来存储存储在每个提交栈输入单元中的完成候选的指令的提交范围寄存器，并且执行用于完成包括在该线程中的指令的处理;线程选择装置，用于发送指令的提交事件 涉及在对存储在提交范围寄存器中的指令执行提交处理时对应于指令的每个线程执行单元中提供的性能分析电路。

    PROCESSOR DEVICE
    139.
    发明申请
    PROCESSOR DEVICE 有权
    处理器件

    公开(公告)号：US20080040589A1

    公开(公告)日：2008-02-14

    申请号：US11875431

    申请日：2007-10-19

    Applicant: Mariko SAKAMOTO ,  Toshio Yoshida

    Inventor： Mariko SAKAMOTO ,  Toshio Yoshida

    IPC: G06F9/30

    CPC classification number: G06F9/3867 ,  G06F9/30181 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/384 ,  G06F9/3855 ,  G06F9/3857 ,  G06F9/3885

    Abstract: A processor device having a reservation station (RS) is concerned. In case the processor device has plural RS, the RS is associated with an arithmetic pipeline, and two RS make a pair. When one RS of the pair cannot dispatch an instruction to an associated arithmetic pipeline, the other RS dispatches the instruction to that arithmetic pipeline, or delivers its held instruction to the one RS. In case one RS is equipped, plural entries in the RS are divided into groups, and by dynamically changing this grouping according to the dispatch frequency of the instruction to the arithmetic pipelines or the held state of the instructions, the arithmetic pipelines are efficiently utilized. Incidentally, depending on the grouping of the plural entries in the RS, a configuration as if the plural RS were allocated to each arithmetic pipeline may be realized.

    Abstract translation: 涉及具有保留站（RS）的处理器设备。 在处理器设备具有多个RS的情况下，RS与算术流水线相关联，并且两个RS成对。 当该对的一个RS不能向相关联的算术流水线发送指令时，另一个RS将指令发送到该算术流水线，或者将其保持的指令递送到一个RS。 在配备一个RS的情况下，RS中的多个条目被分成组，并且通过根据指令的调度频率动态地改变该分组到算术流水线或指令的保持状态，可以有效地利用算术流水线。 顺便提及，根据RS中的多个条目的分组，可以实现如同将多个RS分配给每个运算管线的配置。

    Linear guide apparatus
    140.
    发明授权
    Linear guide apparatus 有权
    直线导轨装置

    公开(公告)号：US07306373B2

    公开(公告)日：2007-12-11

    申请号：US10934758

    申请日：2004-09-07

    Applicant: Yasuyuki Yamazaki ,  Toshio Yoshida

    Inventor： Yasuyuki Yamazaki ,  Toshio Yoshida

    IPC: F16C29/06

    CPC classification number: F16C29/0657 ,  F16C29/0602

    Abstract: A slider is constituted by a main body made of a metal and a frame member and an end cap made of a synthetic resin. The main body is provided with a rolling groove. The frame member is provided with a return passage and an inner side groove of a direction changing passage. The end cap is provided with an outer side groove of the direction changing passage. A longest outer dimension in a slider width direction between lower end portions of inner legs of the main body is made to be larger than a shortest dimension in the slider width direction between projected portions of the frame member. The frame member is detachably engaged with the main body by putting a side of a leg portion of the main body to and from a side of a frame member horizontal portion by elastically deforming the frame member.

    Abstract translation: 滑块由金属制的主体和框架构件和由合成树脂制成的端盖构成。 主体设有滚动槽。 框架构件设置有方向转换通道的返回通道和内侧槽。 端盖设有方向转换通道的外侧槽。 在主体的内腿的下端部之间沿滑块宽度方向的最长的外部尺寸大于框架构件的突出部分之间的滑块宽度方向上的最短尺寸。 框架构件通过使框架构件弹性变形而将主体的腿部的一侧放置在框架构件水平部分的侧面并且从框架构件水平部分的侧面可拆卸地与主体接合。

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